Land Grid Array; Expansion Interface Ii - Analog Devices ADSP-BF526 EZ-Board Manual

Land Grid Array

The ADSP-BF526 EZ-Board has provisions for probing every port pin
and the EBIU interface of the processor on connectors
connector locations are intended for use with a Tektronix DMAX logic
analyzer connector, but can be probed with any oscilloscope or logic ana-
lyzer. Connectors
connector can use either the primary or secondary retention post. For
P7
pinout information, refer
page B-1.
For more information on the Tektronix DMAX logic analyzer interface,
go to the Tektronix Web site.

Expansion Interface II

The expansion interface II allows an Analog Devices EZ-Extender
custom-design daughter board to be tested across various hardware plat-
forms that have the same expansion interface.
The expansion interface II implemented on the ADSP-BF526 EZ-Board
consists of four connectors, three of which are 0.1 in. shrouded headers
( ) and the last of which is a Samtec QMS series header (
P2—4
nectors contain a majority of the ADSP-BF526 processor signals. For the
pinout of the connectors, go to
page B-1. The mechanical dimensions of the expansion connectors can be
obtained by contacting
For more information about daughter boards, visit the Analog Devices
Web site at:
http://www.analog.com/processors/tools/blackfin
Limits to current and interface speed must be taken into consideration
when using the expansion interface II. Current for the expansion interface
II is sourced from the EZ-Board, therefore, the current should be limited
to 1A for 5V and 500 mA for the 1.8V planes. When a battery supplies
ADSP-BF526 EZ-Board Evaluation System Manual
Using The ADSP-BF526 EZ-Board
and require the primary retention posts, while
P5 P6
to"ADSP-BF526 EZ-Board Schematic" on
"ADSP-BF526 EZ-Board Schematic" on
Technical Support.
, , and . The
P5 P6 P7
®
or a
). The con-
J1
.
1-29