System Architecture - Analog Devices ADSP-21161N EZ-KIT Lite Manual
Evaluation system
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System Architecture
System Architecture
This section describes the processor's configuration on the EZ-KIT Lite
board.
SRAM
25MHz
Oscillator
SPI
Connector
Toshiba
TORX173
Optical
Reciever or
COAX input
5V
A5V 3.3V
Power
Regulatiors
Figure 2-1. System Architecture Block Diagram
2-2
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JTAG
Host
Header
Connector
AD[15:0]
Control
Host Port
Interface
ADSP-21161N
1.8V
VDD_INT
3.3V
VDD_EXT
CLK_IN
SPI
SPORT0/2
CS8416 SPDIF
AD1886
Receiver
Codec
Stereo Amplifiers
1.8V
RCA Phono Line
IN(2) OUT(6)
Connectors 1/8"
Mic Connector
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EMI
Connectors
D[7:0]
A[18:0]
Control
External Memeory
Interface
DSP
SPORT1/3
SPORT1/3
Connector
AD1852
Auxilliary
DAC
Stereo Amplifiers
RCA Phono Line
OUT(2)
Connectors
8 Bit Flash
Memory
4MBit
SDRAM
Memory
48MB (8M x
48 bit)
LEDs (6)
PBs (7)
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