Analog Devices ADSP-BF526 EZ-Board Manual page 126

jumpers
diagram of locations,
JP10 (SENSE2 select),
JP11 (RST/ETH LED), 1-35,
JP14 (UART SD), 1-35,
JP15 (CHG GPIO),
JP16 (OTP flag enable),
JP17 (CHG control),
JP2 (UART1 loopback),
JP3 (UART1 enable), 1-20, 1-25, 1-35,
JP5 (LED enable), 1-35,
JP6 (mic select), 1-23,
JP7 (CFG WP), 2-21
JP8 (EXP 5V select),
JP9 (VR7 enable), 2-21
P11 (VDDEXT power), 1-36,
P12 (VDDMEM power), 1-36,
P13 (VDDINT power), 1-36,
P19 (SRAM power),
P21-22 (ETH PWR), 1-35,
P23 (R274 JMP), 2-26
P25 (BATT installed), 2-18, 2-26,
L
land grid array connectors (P5-7), 1-29,
LED2_HOSTACK signal,
LED enable jumper (JP5), 1-35,
LEDs
diagram of locations,
LED10 (battery charge),
LED1-2 (Ethernet), 1-35,
LED3-5 (PF8, PG11-12), 1-26,
LED4 (USB monitor),
LED7 (reset), 2-28
LED8 (batt GD), 2-28
LED9 (battery low),
license restrictions, 1-13
Lockbox secure technology,
ADSP-BF526 EZ-Board Evaluation System Manual
2-19
2-22
2-22
2-23
2-23
2-23
2-24
2-20
2-20
2-20
2-21
2-21
2-25
2-25
2-25
1-36
2-25
2-29
2-33
1-28
2-20
2-27
2-29
2-28
2-28
1-10
2-29
1-13
M
MAC address, 1-21
media independent interface (MII),
Media Instruction Set Computing (MISC),
memory map, of this EZ-Board,
microphone
gain switch (SW9), 1-22,
headphone select (SW10), 1-23,
select jumper (JP6), 1-23,
Micro Signal Architecture (MSA),
N
NAND
flash memory interface,
enable switch (SW3),
NDCE#_HOSTD10 signal,
notation conventions, xxi
O
oscilloscope, 1-36
OTP_FLAG signal, 1-27
OTP memory
flag enable jumper (JP16),
writes, 1-31, 2-24
P
package contents, 1-3
parallel flash memory,
See also NAND, flash memory
parallel peripheral interface (PPI), See PPI
interface
PF0-7 programmable flags,
PF8 programmable flag, 2-3,
PF9-15 programmable flags,
PG0-10 programmable flags,
PG11 programmable flag, 2-5,
PG12 programmable flag, 2-5,
PG13-15 programmable flags,
Index
1-21
xi
1-14
2-12
2-13
2-21
xi
1-18
1-18
1-18
2-23
1-17
2-3
2-28
2-3
2-5
2-28
2-28
2-5
I-3