System Architecture; Figure 4-1: System Architecture - Analog Devices ADSP-21161N EZ-KIT LITE Manual

4.2 System Architecture

The EZ-KIT Lite has been designed to demonstrate the capabilities of the ADSP-
21161N DSP. This section will describe the DSP's configuration on the EZ-KIT
Lite board.

Figure 4-1: System Architecture

The DSP core voltage is 1.8V and the external interface operates at 3.3V.
A 12.5MHz through-hole oscillator supplies the input clock to the DSP.
Footprints are provided on the board for a surface-mount oscillator and a through-
hole crystal for alternate user installed clocks. The speed at which the core
operates is determined by the location of the Clock Mode jumpers (JP21). (See
section 4.3.12.) By default, the DSP core runs at 100MHz.
4-2
ADSP-21161N EZ-KIT Lite Evaluation System Manual