Summary of Contents for Analog Devices EZ-Board ADSP-BF518F
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ADSP-BF518F EZ-Board Evaluation System Manual Revision 1.0, January 2009 Part Number 82-000217-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106...
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Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use;...
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Regulatory Compliance The ADSP-BF518F EZ-Board is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end prod- uct or as a portion of a consumer end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity.
What’s New in This Manual ............xvi Technical or Customer Support ............. xvii Supported Processors ..............xvii Product Information ..............xviii Analog Devices Web Site ............xviii VisualDSP++ Online Documentation ........xix Technical Library CD ............... xix Related Documents ..............xx Notation Conventions ..............
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CONTENTS Power ..................B-15 Series Terminators ..............B-16 INDEX ADSP-BF518F EZ-Board Evaluation System Manual...
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PREFACE Thank you for purchasing the ADSP-BF518F EZ-Board™, Analog ® Devices, Inc. evaluation system for Blackfin processors. Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today’s embedded audio, video, and communications applications. They deliver breakthrough signal-processing performance and power efficiency within a reduced instruction set computing (RISC) programming model.
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ADSP-BF518F processor and evaluation board’s peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. To learn more about Analog Devices emulators and processor development tools, go to http://www.analog.com/dsp/tools/ The ADSP-BF518F EZ-Board provides example programs to demonstrate the capabilities of the product.
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176-pin LQFP package 25 MHz crystal • Programmable VDDINT core power Analog Devices AD5258 TWI digital potentiometer Analog Devices ADP1715 low dropout linear regulator • Synchronous dynamic random access memory (SDRAM) Micron MT48LC32M16A2TG – 64 MB (32M x 16-bits) • Parallel flash memory Numonyx M29W320EB –...
Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices...
Manual Contents Manual Contents The manual consists of: • Chapter 1, “Using ADSP-BF518F EZ-Board” on page 1-1 Describes EZ-Board functionality from a programmer’s perspective and provides an easy-to-access memory map. • Chapter 2, “ADSP-BF518F EZ-Board Hardware Reference” on page 2-1 Provides information on the EZ-Board hardware components.
Preface Technical or Customer Support You can reach Analog Devices, Inc. Customer Support in the following ways: • Visit the Embedded Processing and DSP products Web site at http://www.analog.com/processors/technical_support • E-mail tools questions to processor.tools.support@analog.com • E-mail processor questions to processor.support@analog.com (World wide support)
Product Information Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, , provides information www.analog.com about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors.
Preface VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documenta- tion. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format (.
Product Information Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata.
Preface Table 2. Related VisualDSP++ Publications (Cont’d) Title Description VisualDSP++ Linker and Utilities Manual Description of the linker function and com- mands. VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function and commands. VisualDSP++ Device Drivers and System Services Description of the device drivers’...
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Notation Conventions Example Description Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if ... Caution: Device damage may result if ...
1 USING ADSP-BF518F EZ-BOARD This chapter provides specific information to assist you with development of programs for the ADSP-BF518F EZ-Board evaluation system. The following topics are covered. • “Package Contents” on page 1-3 • “Default Configuration” on page 1-4 • “EZ-Board Installation”...
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• “ADC Interface” on page 1-18 • “UART Interface” on page 1-19 • “RTC Interface” on page 1-20 • “LEDs and Push Buttons” on page 1-21 • “JTAG Interface” on page 1-22 • “Land Grid Array” on page 1-22 • “Expansion Interface II”...
• 7-foot Ethernet patch cable • Two 6-foot 3.5 mm male-to-male audio cables • 18-inch SMA to SMA coaxial cable If any item is missing, contact the vendor where you purchased your EZ-Board or contact Analog Devices, Inc. ADSP-BF518F EZ-Board Evaluation System Manual...
3 with instructions in this section. There are two options to connect the EZ-Board hardware to a personal computer (PC) running VisualDSP++ 5.0: via an Analog Devices emula- tor or via a standalone debug agent module. The standalone debug agent allows a debug agent to interface to the ADSP-BF518F EZ-Board.
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Using ADSP-BF518F EZ-Board Figure 1-1. Default EZ-Board Hardware Setup ADSP-BF518F EZ-Board Evaluation System Manual...
EZ-Board Session Startup To connect the EZ-Board to a PC via an emulator: 1. Plug the 5V adaptor into connector (labeled 2. Attach the emulator header to connector (labeled ) on the JTAG back side of the EZ-Board. To connect the EZ-Board to a PC via a standalone debug agent: The debug agent can be used only when power is supplied from the wall adaptor.
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Using ADSP-BF518F EZ-Board down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 3. 2. To connect to a new EZ-KIT Lite session, start Session Wizard by selecting one of the following.
Evaluation License Restrictions session. Click Next. 6. The Finish page of the wizard appears on the screen. The page dis- plays your selections. Check the selections. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++ creates the new session and connects to the EZ-Board.
Using ADSP-BF518F EZ-Board Memory Map The ADSP-BF518F processor has internal static random access memory (SRAM) used for instructions and data storage. See Table 1-1. The inter- nal memory details can be found in the ADSP-BF51x Blackfin Processor Hardware Reference. The ADSP-BF518F EZ-Board includes four types of external memory: synchronous dynamic random access memory (SDRAM), serial peripheral interconnect (SPI) flash, parallel flash, and eMMC.
Using ADSP-BF518F EZ-Board SDRAM Interface The ADSP-BF518F processor connects to a 64 MB Micron MT48LC32M16A2TG-75 chip through the external bus interface unit (EBIU). The SDRAM chip can operate at a maximum clock frequency of 80 MHz, which is the ADSP-BF518F processor limitation. With a VisualDSP++ session running and connected to the EZ-Board via the USB standalone debug agent, the SDRAM registers are configured automatically each time the processor is reset.
eMMC Interface Flash memory is pre-loaded with boot code for the power-on-self test (POST) program. For more information, refer to “Power-On-Self Test” on page 1-24. Flash memory also is preloaded with configuration flash information, which contains board revision, BOM revision, and other data.
Using ADSP-BF518F EZ-Board SD Interface The ADSP-BF518F processor has a secure digital interface. The SD inter- face consists of a clock pin, a command pin, and a four-bit data bus. The SD interface of the processor connects gluelessly to the on-board SD con- nector.
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SPI Interface U-Boot is controlled via a serial connection. The default setting is 56700 baud, 8 data bits, No parity, 1 stop bit. See “RS-232 Connector (J2)” on page 2-25 for information on the serial connector. For more information about U-Boot, refer to the online documentation http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot For U-Boot support on the Blackfin processors, refer to the online help forums at:...
Using ADSP-BF518F EZ-Board Parallel Peripheral Interface (PPI) The ADSP-BF518F processor provides a parallel peripheral interface (PPI), supporting data widths up to 16 bits. The PPI interface provides three multiplexed frame syncs, a multiplexed clock, and 16 multiplexed data lines. The full PPI port is accessible on the expansion interface II connector ( ).
Ethernet Interface If the processor pins are needed for the expansion interface II, disconnect the rotary encoder switch via the three-position rotary enable switch For more information, see “Encoder Enable Switch (SW19)” on SW19 page 2-14. An example program is included in the EZ-Board installation directory to demonstrate how to set up and access the rotary encoder interface.
Using ADSP-BF518F EZ-Board The PHY portion of the Ethernet chip connects to a Pulse HX1188 mag- netics, then to standard RJ-45 Ethernet connectors ( more information, see “Ethernet Connectors (J14–15)” on page 2-27. Example programs are included in the EZ-Board installation directory to demonstrate how to use the Ethernet interface.
ADC Interface are 3.5 mm connectors for the audio portion of the board. connects the mic on the top portion and line-in on the bottom. con- nects the headphone on the top portion and line-out on the bottom. If there is no 3.5 mm cable plugged into the bottom of either , the signals are looped back inside the connector.
The ADSP-BF518F processor has two built-in universal asynchronous receiver transmitters (UARTs). share the processor’s pins with UART0—1 other peripherals on the EZ-Board. has full RS-232 functionality via the Analog Devices 3.3V UART0 ADM3202 line driver and receiver ( ). When using , do not set...
RTC Interface Example programs are included in the EZ-Board installation directory to demonstrate UART and RS-232 operations. For more information on the UART interface, refer to the ADSP-BF51x Blackfin Processor Hardware Reference. RTC Interface The ADSP-BF518F processor has a real-time clock (RTC) and a watchdog timer.
Using ADSP-BF518F EZ-Board LEDs and Push Buttons The EZ-Board provides two push buttons and three LEDs for gen- eral-purpose I/O, as well as two additional push buttons intended for power down and wake functionality, which also can be used as GPIO flag pins.
See “EZ-Board Installation” on page 1-4 for more information. For more information about emulators, contact Analog Devices or go to: http://www.analog.com/processors/blackfin/evaluationDevelop- ment/crosscore/ Land Grid Array The ADSP-BF518F EZ-Board has provisions for probing every port pin and the EBIU interface of the processor on connectors .
Using ADSP-BF518F EZ-Board Expansion Interface II The expansion interface II allows an Analog Devices EZ-Extender or a custom-design daughter board to be tested across various hardware plat- forms that have the same expansion interface. The expansion interface II implemented on the ADSP-BF518F EZ-Board consists of four connectors, three of which are 0.1 in.
Power Measurements Power Measurements Several locations are provided for measuring the current draw from vari- ous power planes. Precision 0.1 ohm shunt resistors are available on the VDDINT, VDDEXT, VDDMEM, and VDDFLASH voltage domains. For current draw measuments, the associated jumper ( ) should be P8—11 removed.
Using ADSP-BF518F EZ-Board Example Programs Example programs are provided with the ADSP-BF518F EZ-Board to demonstrate various capabilities of the product. The programs are installed with the VisualDSP++ software and can be found in the directory. <install_path>\Blackfin\Examples\ADSP-BF518F EZ-Board Refer to the readme file provided with each example for more information.
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Reference Design Information 1-26 ADSP-BF518F EZ-Board Evaluation System Manual...
2 ADSP-BF518F EZ-BOARD HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-BF518F EZ-Board board. The following topics are covered. • “System Architecture” on page 2-2 Describes the ADSP-BF518F EZ-Board configuration and explains how the board components interface with the processor. •...
This EZ-Board is designed to demonstrate the ADSP-BF518F Blackfin processor capabilities. The processor has an I/O voltage of 3.3V. The core voltage of the processor is controlled by an Analog Devices ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258 digipot, which...
ADSP-BF518F EZ-Board Hardware Reference is configurable over the 2-wire interface (TWI) signals. Refer to the power-on-self test (POST) example in the ADSP-BF518F installation directory of VisualDSP++ for information on how to set up the TWI interface. The core voltage and clock rate can be set on the fly by the processor. The input clock is 25 MHz.
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Programmable Flags Table 2-1. PF Port Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-Board Function Default: ERx- ERXCLK Land grid array, expansion interface II CLK/PPID4/PWM_BL/TACLK1 Default: ERxDV/PPID5/PWM_CH/TACI0 ERXDV Land grid array, expansion interface II Default: COL/PPID6/PWM_CL/TACI1 Land grid array, expansion interface II Default: SPI0_SSEL1/PPID7/PWM_SYNC SPI0_SSEL1...
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ADSP-BF518F EZ-Board Hardware Reference Table 2-2. PG Port Programmable Flag Connections Processor Pin Other Processor Function EZ-Board Function Default: MIICRS/RMII- MIICRS , land grid array, expansion interface II CRS/HWAIT/SPI1_SSEL3 HWAIT Default: ERxER/DMAR1/PWM_CH ERXER Land grid array, expansion interface II Default: MIITxCLK/RMIIREF_CLK/ MIITXCLK Land grid array, expansion interface II...
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Programmable Flags Table 2-2. PG Port Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-Board Function Default: PG14 SPI0_MOSI/TMR1/PPIFS2_2/ SPI0_MOSI Land grid array, expansion interface II PWM_TRIPB Default: PG15 SPI0_SSEL2/PPIFS3/AMS[3] AMS3 , land grid array, expansion SPI0_SEL2 interface II Table 2-3.
ADSP-BF518F EZ-Board Hardware Reference Push Button and Switch Settings This section describes operation of the push buttons and switches. The push button and switch locations are shown in Figure 2-2. Figure 2-2. Push Button and Switch Locations ADSP-BF518F EZ-Board Evaluation System Manual...
Push Button and Switch Settings Boot Mode Select Switch (SW1) The boot mode select switch ( ) determines the boot mode of the pro- cessor. Table 2-4 shows the available boot mode settings. By default, the ADSP-BF518F processor boots from the on-board parallel flash memory. The selected position of is marked by the notch down the entire rotating portion of the switch, not the small arrow.
Push Button and Switch Settings interface is shared with other on-board components, such as SPORT1 the eMMC device and push buttons. MIC Gain Switch (SW5) The microphone gain switch ( ) sets the gain of the signal, which is connected to the top 3.5 mm jack ( ).
ADSP-BF518F EZ-Board Hardware Reference Ethernet Port 1 Configuration Switch (SW7) The Ethernet port 1 configuration switch ( ) is used to configure cer- tain Ethernet settings related to port 1 via hardware, instead of software (see Table 2-8). Table 2-8. Ethernet Port 1 Configuration Switch (SW7) SW7 Position (Default) Description Position...
Push Button and Switch Settings UART Setup Switch (SW10) The UART setup switch ( ) configures the signals from the SW10 UART0 GPIO pins of the processor. Position 4 is used to place the port of UART0 the processor in a loopback condition. The jumper connects the UART0_TX line of the processor to the signal of the processor.
ADSP-BF518F EZ-Board Hardware Reference send a high ( ) to the processor. The GPIO enable switch ( ) discon- nects the push buttons from the corresponding push button signals. Refer “PB Enable Switch (SW2)” on page 2-8 for more information. Rotary Encoder with Momentary Switch (SW14) The rotary encoder ( ) can be turned clockwise for an up count or...
Push Button and Switch Settings Ethernet Mode Switch (SW17) The Ethernet mode switch ( ) selects the control interface for the SW17 KSZ8893M device. By default, SW17 selects the SPI interface. TWI is selected by setting SW17 Ethernet Port 2 Configuration Switch (SW18) The Ethernet port 2 configuration switch ( ) is used to configure cer- SW18...
Block 70 contains 64 KB of configuration data at address range . When the jumper is installed on 0x203 F0000—0x203 FFFFF and the parallel flash driver from Analog Devices is used, block 70 is read-only. By default, is installed. ADC Range Jumper (JP4)
Jumpers OTP Flag Enable Jumper (JP14) The OTP flag enable jumper ( ) controls the precise 7V OTP voltage JP14 regulator. When installed, allows OTP writes. JP14 must be installed for OTP writes to be successful. The nominal 2.5V JP14 for OTP is temporarily raised to 7V when is set high.
ADSP-BF518F EZ-Board Hardware Reference to parallel flash. When using SPI flash, the available memory that is acces- sible on parallel flash is reduced from 4 MB to 3 MB. By default, JP16 not installed. ADC Channel Select Jumpers (JP17–28) The ADC channel select jumpers are used to connect the SMA JP17—28 connector to the ADC input.
Jumpers VDDMEM Power Jumper (P10) The VDDMEM power jumper ( ) is used to measure the voltage and current supplied to the memory interface of the processor. By default, , and the power flows through the two-pin IDC header. To measure power, remove and measure voltage across the 0.1 ohm resistor.
ADSP-BF518F EZ-Board Hardware Reference LEDs This section describes the on-board LEDs. Figure 2-4 shows the LED locations. Figure 2-4. LED Locations ADSP-BF518F EZ-Board Evaluation System Manual 2-21...
When is lit, it indicates that the master reset of all major ICs is LED9 active. The reset LED is controlled by the Analog Devices ADM708 supervisory reset circuit. You can assert the reset push button ( ) to SW11 assert the master reset and activate For more information, see “Reset...
ADSP-BF518F EZ-Board Hardware Reference Power LED (LED13) When is lit solid, it indicates that the board is powered. LED13 ADSP-BF518F EZ-Board Evaluation System Manual 2-23...
Connectors Connectors This section describes connector functionality and provides information about mating connectors. The connector locations are shown in Figure 2-5. Connectors shown with a dotted line are on the backside of the PCB Figure 2-5. Connector Locations 2-24 ADSP-BF518F EZ-Board Evaluation System Manual...
ADSP-BF518F EZ-Board Hardware Reference Expansion Interface II Connector (J1) is a board-to-board connector providing signals from the external bus interface unit (EBIU) of the processor. The connector is located on the left edge of the board. For more information, see “Expansion Interface II”...
Connectors Dual Audio Connectors (J4–5) Part Description Manufacturer Part Number 3.5 mm dual stereo jack SWITCHCRAFT 35RAPC7JS Mating Cable (shipped with the EZ-Board) 3.5 mm male/male 6’ cable RANDOM 10A3-01106 SMA Connectors (J7, J16–26) Part Description Manufacturer Part Number SMA straight jack receptacle JOHNSON COMPONENTS 142-0701-201 Mating Cable (shipped with the EZ-Board)
ADSP-BF518F EZ-Board Hardware Reference Ethernet Connectors (J14–15) Part Description Manufacturer Part Number RJ-45 Ethernet jack STEWART SS-6488-NF Mating Cable (shipped with the EZ-Board) Cat 5E patch cable RANDOM PC10/100T-007 JTAG Connector (P1) The JTAG header is the connecting point for a JTAG connection to the ADSP-BF518F processor.
Connectors Part Description Manufacturer Part Number Mating Connector 50-position 0.1”, SMT socket SAMTEC SSW-125-22-F-D-VS Expansion Interface II Connector (P3) is a board-to-board connector providing signals for the PPI, TWI, and GPIO signals of the processor. The connector is located on the upper edge of the board.
ADSP-BF518F EZ-Board Hardware Reference Standalone Debug Agent Connector (ZP1) connects the standalone debug agent to the EZ-Board. The standalone debug agent requires both the connectors. For more informa- tion, see “EZ-Board Installation” on page 1-4. ADSP-BF518F EZ-Board Evaluation System Manual 2-29...
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Connectors 2-30 ADSP-BF518F EZ-Board Evaluation System Manual...
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A ADSP-BF518F EZ-BOARD BILL OF MATERIALS The bill of materials corresponds to “ADSP-BF518F EZ-Board Schematic” on page B-1. Ref. Qty. Description Reference Manufacturer Part Number Designator 74LVC14A 74LVC14AD SOIC14 IDT74FCT3244A IDT74FCT3244APYG PY SSOP20 32.768KHZ EPSON MC-156-32.7680KA-A0: OSC008 ROHS 25MHZ OSC003 EPSON SG-8002CA MP SN74LVC1G08...
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Ref. Qty. Description Reference Manufacturer Part Number Designator BF518 STMICRO M29W320EB70ZE6E M29W320EB "U5" MTFC2GDKDM MICRON MTFC2GDKDM-WT FBGA169 ADM708SARZ ANALOG ADM708SARZ SOIC8 DEVICES ADM3202ARNZ ANALOG ADM3202ARNZ SOIC16 DEVICES ADSP-BF518F ANALOG ADSP-BF518BSWZ-4F4 LQFP176 DEVICES ADP1864AUJZ ANALOG ADP1864AUJZ-R7 SOT23-6 DEVICES ADP1611 ANALOG ADP1611ARMZ-R7 MSOP8 DEVICES ADP1715...
"MIC GAIN" SW4: MIC GAIN 3.3V HP OUT MIC IN POS. GAIN 40.2K 5 (14dB) 0402 "MIC/HP LPBK" "AUDIO MODE" 1 (0dB) 90.9K 0402 DEFAULT 0.5 (-6dB) 3.3V 3.3V DIP4 0402 MICIN LHPOUT_RDIV SWT018 RHPOUT_RDIV FER19 0805 0603 AVDD AUDIO_MODE LINE OUT LINE IN DIP4...
3.3V All USB interface circuitry is considered proprietary and has been omitted from this schematic. When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at "ENCODER ENABL" http://www.analog.com R140 R141 R142 511.0 511.0 511.0...
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INDEX JTAG MAC address, 1-16 interface, 1-22 media independent interface (MII), 1-16 connector (P1), 1-6, 1-22, 2-27 Media Instruction Set Computing (MISC), jumpers memory map, of this EZ-Board, diagram of locations, 2-16 MICBIAS signal, 2-18 JP11-12 (LED select), 2-17 MICIN signal, 2-18 JP13 (Ethernet power down), 2-17...
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INDEX PH2 programmable flag, secure digital (SD) interface, 1-12, 1-13 PH3 programmable flag, 1-21, 2-6, 2-18, 2-22 serial peripheral interconnect (SPI) ports, See PH4 programmable flag, SPI interface PH5-6 programmable flags, 1-21, 2-6, 2-22 session startup procedure, PH7 programmable flag, SMA connectors (J7, J16-26), 2-26 POST (power-on-self test) program, 1-12, 1-19,...
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INDEX SW6 (mic select) switch, 1-18, 2-10 universal asynchronous receiver transmitter, See SW7 (Ethernet port 1 config) switch, 1-16, 2-11 UART0, UART1 SW8 (Ethernet config) switch, 2-11 USB monitor LED (LED4), switches, diagram of locations, system architecture, of this EZ-Board, VDDEXT power jumper (P9), 2-19...
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