program the flag pins, refer to the ADSP-BF52x Blackfin Processor Hard-
ware Reference.
is shared with the
LED1
signal. The
HOSTACK
using the PPI 16-bit data interface,
The
and
LED1
LED2
nectors
,
, and
J1
P2
page 2-31
and
page 2-33
for more information.
The two general-purpose push buttons are labeled
of each individual button can be read through programmable flag inputs
and
. The flag reads '
PG0
PG13
pressed. When the switch is released, the flag reads '
between the push buttons and processor inputs is established through
positions 1 and 2 of the DIP switch,
Push buttons 1 and 2 of
interface II connectors (
GPIO signals on the expansion interface II, turn
.
OFF
Push button 1 cannot be used when
rate, when charging the battery over USB. To set this up, turn
See
"CHG GPIO Jumper (JP15)" on page 2-23
Push button 2 can be connected to the
switches
SW13.2 OFF
allows the USB OTG interface to power an external USB device with 5V.
Push button 2 also can be connected to the
essary to supply 7V for writing to OTP. To set up the EZ-Board to
control the
OTP_FLAG
. Push button 2 is shared with signal
SW20.6 OFF
Interface" on page 1-23
for more information.
ADSP-BF526 EZ-Board Evaluation System Manual
signal, while
HOSTWR#
signal is shared with the
LED0
signals also connect to the expansion interface II (con-
). See
"Expansion Interface II Connector (J1)" on
P4
"Expansion Interface II Connectors (P2 and P4)" on
' when a corresponding switch is being
1
are used as GPIO signals on the expansion
SW20
,
,
J1
P2
P4
,
, and
SW20.5 OFF
signal, set switches
and
"GPIO Enable Switch (SW20)" on page 2-16
Using The ADSP-BF526 EZ-Board
is shared with the
LED2
PPID8
mimics
LED0
PPID8
PB1
.
SW20
). To use the
and
PG0
SW20
is set up to control the charge
PG0
for more information.
signal by setting
USB_VRSEL
. The
SW20.6 ON
OTP_FLAG
SW13.2 OFF
HOSTADDR
signal. When
.
and
. The status
PB2
'. A connection
0
port pins as
PG13
positions 1 and 2
SW20.1 OFF
signal
USB_VRSEL
signal, which is nec-
,
, and
SW20.5 ON
. See
"USB OTG
1-27
.
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