Network Synchronization Considerations - Alcatel-Lucent 7750 SR Manual

Network Synchronization Considerations

Each OC-3/STM-1 port can be independently configured to be loop-timed or node-timed. Each
OC-3/STM-1 port can be configured to be a timing source for the node.
Each DS-1 or E-1 channel without CAS signaling enabled can be independently configured to be
loop-timed, node-timed, adaptive-timed or differential-timed. Each DS-1 or E-1 channel with CAS
signaling enabled can be independently configured to be loop-timed or node-timed. Adaptive-
timed and differential-timed are not supported on DS-1 or E-1 channels with CAS signaling
enabled.
A CES circuit's adaptive recovered clock can be used a timing reference source for the node (ref1
or ref2). This is required to distribute network timing to network elements which only have packet
connectivity to the network. One timing source on the CMA/MDA can be monitored for timing
integrity. Both timing sources can be monitored if they are configured on separate CMA/MDAs
while respecting the timing subsystem slot requirements. If a CES circuit is being used for
adaptive clock recovery at the remote end (such that the local end is now an adaptive clock
master), it is recommended to set the DS-1/E-1 to be node-timed to prevent potential jitter issues
in the recovered adaptive clock at the remote device.
For differential-timed circuits, the following timestamp frequencies are supported: 103.68 MHz
(for recommended >100MHz operation), 77.76 MHz (for interoperability with SONET/SDN
based systems such as TSS-5) and 19.44 MHz (for Y.1413 compliance).
Adaptive and differential timing recovery must comply with published jitter and wander
specifications (G.823, G.824 and G.8261) for traffic interfaces under typical network conditions
and for synchronous interfaces under specified packet network delay, loss and delay variance
(jitter) conditions. The packet network requirements to meet the synchronous interface
requirements are to be determined during the testing phase.
On the 7710 SR CES CMA, a BITS port is also provided. The BITS port can be used as one of the
two timing reference sources in the system timing subsystem. The operation of BITS ports
configured as ref1 or ref2 is the same as existing ports configured as ref1 and ref2 with all options
supported. The operation of the 7750/7450 BITS source is unchanged and the BITS ports are not
available on the CES MDAs (only SF/CPM BITS are currently available).
Page 194 7750 SR OS Services Guide