Jitter Buffer; Ces Circuit Operation - Alcatel-Lucent 7750 SR Manual

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Jitter Buffer

For each circuit, the maximum receive jitter buffer are configurable. Playout from this buffer starts

when the buffer is 50% full to give an operational packet delay variance (PDV) equal to 75% of

the maximum buffer size. The default value for the jitter buffer is nominally 5 ms. However, for

lower speed N*64kbps circuits and CAS circuits, the following default values are used to align

with the default number of frames (and resulting packetization delay) to allow at least two frames

to be received before starting to playout the buffer. The jitter buffer is at least four times the

packetization delay. The following default jitter buffer values for structured circuits apply:

Basic CES (DS1 & E1):

The circuit status can be tracked to be either up, loss of packets or administratively down.

Statistics are available for the number of in service seconds and the number of out of service

seconds when the circuit is administratively up.

Jitter buffer overrun and underrun counters are available by statistics and optionally logged while

the circuit is up. On overruns, excess packets are discarded and counted. On underruns, all ones

are sent for unstructured circuits. For structured circuits, all ones or a user defined data pattern is

sent based on configuration. Also, if CAS is enabled, all ones or a user defined signaling pattern is

sent based on configuration.

For each CES circuit, alarms can be optionally disabled/enabled for stray packets, malformed

packets, packet loss, receive buffer overrun and remote packet loss. An alarm is raised if the defect

persists for 3 seconds, and cleared when defect no longer persists for 10 seconds. These alarms are

logged and trapped when enabled.

2<=N<= 4, 16 ms

5<=N<=15, 8 ms

7750 SR OS Services Guide