Intel 815EG Design Manual page 12

Revision History
Rev. No.
-001
-002
12
Description
• Initial Release.
• Added Section 2.4, Electrostatic Discharge Platform
Recommendations
• Replaced Figure 98, Power Delivery Map, in Section 13, Power
Delivery
• Revised Section 13.4.3, 3.3V/V5REF Sequencing
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• Revised Table 33. Intel
CK-815 (3-DIMM) Clocks, Intel
(3-DIMM) Clocks, in Section 12.2, 3-DIMM Clocking
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• Revised Table 32, Intel
CK-815 (2-DIMM) Clocks, in Section
12.1, 2-DIMM Clocking
• Replaced Figure 79, RTC Power Well Isolation Control, in Section
11.8.6, Power Well Isolation Control Requirements
• Replaced Figure 84, Trace Routing, in Section 11.9.2.1, General
Trace Routing Considerations
• Revised Section 13.4.3, 3.3V/V5REF Sequencing
• Revised Checklist Recommendations for 5V_REF_SUS in
Section 14.4.15, Power
• Added SUSCLK to the RTC Checklist in Section 14.4.12
• Added Section 10.3 Power Supply PS_ON Considerations
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CK-815
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Intel 815EG Chipset Platform Design Guide
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Rev. Date
Sept 2001
Aug 2002