Clock Routing Guidelines; Figure 97. Clock Routing Topologies - Intel 815EG Design Manual

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12.3

Clock Routing Guidelines

This section presents the generic clock routing guidelines for both 2-DIMM and 3-DIMM boards.
For 3-DIMM boards, additional analysis must be performed by the motherboard designer to ensure
that the clocks generated by the external PCI clock buffer meet the PCI specifications for clock
skew at the receiver, when compared with the PCI clock at the ICH2.

Figure 97. Clock Routing Topologies

CK815
CK815
CK815
CK815
CK815
CK815
®
Intel 815EG Chipset Platform Design Guide
Layout 1
Section 1
Layout 2
Section 1
Layout 3
Section 1
Section 0
Section 1
Layout 4
Section 1
Layout 5
Section 1
33 Ω
Section 2
22 Ω
Section 2
10 pF
33 Ω
Section 2
33 Ω
Section 3
33 Ω
Section 2
10 Ω
Section 2
22 pF
Clocking
Connector
Section 3
22 pF
Processor
GMCH
Connector
clk_routing_topo
157