Figure 32. Filter Specification - Intel 815EG Design Manual

R

Figure 32. Filter Specification

NOTES:
1.
2.
3.
Other requirements:
• Use shielded-type inductor to minimize magnetic pickup.
• Filter should support DC current > 30 mA.
• DC voltage drop from VCC to PLL1 should be < 60 mV, which in practice implies series
R < 2 Ω. This also means pass-band (from DC to 1 Hz) attenuation < 0.5 dB for VCC =
1.1 V, and < 0.35 dB for VCC = 1.5 V.
®
Intel 815EG Chipset Platform Design Guide
0.2dB
0dB
-0.5 dB
Forbidden
Zone
-28dB
-34dB
DC 1Hz
passband
Diagram not to scale.
No specification for frequencies beyond fcore.
fpeak should be less than 0.05 MHz.
System Bus Design Guidelines
Forbidden
Zone
1 MHz 66 MHz
fpeak
high frequency
band
fcore
filter_spec
67