Disabling The Native Usb Interface Of Ich2; I/O Apic Design Recommendation; Figure 69. Usb Data Signals - Intel 815EG Design Manual

R

Figure 69. USB Data Signals

P +
P -
I C H 2
The recommended USB trace characteristics are:
• Impedance 'Z0' = 45.4 Ω
• Line Delay = 160.2 ps
• Capacitance = 3.5 pF
• Inductance = 7.3 nH
• Res @ 20° C = 53.9 mΩ
11.4.2

Disabling the Native USB Interface of ICH2

The ICH2 native USB interface can be disabled. This can be done when an external PCI based
USB controller is being implemented in the platform. To disable the native USB Interface, ensure
the differential pairs are pulled down thru 15 kΩ resistors, ensure the OC[3:0]# signals are de-
asserted by pulling them up weakly to VCC3SBY, and that both function 2 & 4 are disabled via
the D31:F0;FUNC_DIS register. Ensure that the 48 MHz USB clock is connected to the ICH2 and
is kept running. This clock must be maintained even though the internal USB functions are
disabled.
11.5

I/O APIC Design Recommendation

Systems not using the I/O APIC should comply with the following recommendations:
• On the ICH2:
 Tie PICCLK directly to ground.
 Tie PICD0, PICD1 to ground through a 10 kΩ resistor.
• On the processor:
 PICCLK requires special implementation for universal motherboard designs.
 Tie PICD0 to 2.5 V through 10 kΩ resistors.
 Tie PICD1 to 2.5 V through 10 kΩ resistors.
®
Intel 815EG Chipset Platform Design Guide
M o t h e r b o a r d T r a c e
D r iv e r
1 5 o h m
< 1 "
1 5 k
M o t h e r b o a r d T r a c e
D r iv e r
1 5 o h m
< 1 "
1 5 k
T r a n s m is s io n L in e
4 5 o h m
O p t io n a l 4 7 p f
4 5 o h m
O p t io n a l 4 7 p f
I/O Subsystem
9 0 o h m
U S B T w is t e d P a ir C a b le
119