Buffer Memory; Buffer Memory List - Mitsubishi Electric Melsec Q Series User Manual
Profibus-dp master module
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3
SPECIFICATIONS
3.4 Buffer Memory
This section explains the buffer memories of the QJ71PB92V.
3.4.1 Buffer memory list
The following shows a list of the buffer memories that are used for transferring data
between the QJ71PB92V and the QCPU.
Address
DEC (HEX)
0 to 2079
System area (Use prohibited)
(0
to 81F
)
H
H
2080
Diagnostic information invalid
setting area
(820
)
H
2081
Global control area
(821
)
H
2082 to 2083
System area (Use prohibited)
(822
to 823
)
H
H
2084
Diagnostic information non-
notification time setting area
(824
)
H
2085
Current diagnostic information
non-notification time area
(825
)
H
2086 to 2253
System area (Use prohibited)
(826
to 8CD
)
H
H
2254
Current operation mode area
(8CE
)
H
2255
Operation mode change request
area
(8CF
)
H
2256
Operation mode change result
area
(8D0
)
H
2257
Local FDL address display area
(8D1
)
H
2258
Offline test status area
(8D2
)
H
2259
Flash ROM storage mode
(8D3
)
H
2260 to 2262
System area (Use prohibited)
(8D4
to 8D6
)
H
H
2263
Control master FDL address
display area
(8D7
)
H
2264
Standby master FDL address
display area
(8D8
)
H
3
- 17
3.4 Buffer Memory
3.4.1 Buffer memory list
Table3.8 Buffer Memory List
Name
Values for masking (invalidating) diagnostic
information from DP-Slaves are set in this
area.
The global control function to be executed is
set in this area.
This area is used to set the time during which
no diagnostic information is notified after
communication start.
This area stores the time (remaining time)
during which no diagnostic information is
notified after communication start.
This area stores data of the currently operating
mode.
When executing the operation mode change
request, a desired operation mode is set in this
area.
This area stores the execution result of the
operation mode change request.
This area stores the FDL address of the local
station.
This area stores the details or result of the self-
diagnostic test.
This area stores the operation mode currently
stored in the flash ROM.
This area stores the FDL address of the
control system QJ71PB92V when it is used in
a redundant system.
This area stores the FDL address of the
standby system QJ71PB92V when it is used in
a redundant system.
* 1 This indicates whether or not read/write is possible from the sequence program.
R: Read only, R/W: Read/write executable
* 2 The initial value varies depending on the QCPU installed with the QJ71PB92V or the parameter.
(
Section 3.4.14)
Description
Read/
Initial
Reference
*1
value
Section
Write
Section
02B9
R/W
H
3.4.6
Section
0
R/W
3.4.9
Section
20
R/W
3.4.6
Section
0
R
3.4.6
Section
0001
R
H
3.4.2
Section
FFFE
R/W
H
3.4.3
Section
0
R
3.4.3
Section
FFFF
R
H
3.4.2
Section
0
R
3.4.2
Section
FFFF
R
H
3.4.2
Section
*2
R
3.4.14
Section
*2
R
3.4.14
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