Mitsubishi Electric Melsec Q Series User Manual page 193

7
PROGRAMMING
(2) Settings
(a) QJ71PB92V settings
(b) DP-Slave Settings
Item
FDL address
Transmission speed
Operation mode
I/O data area for FDL address 1
(Buffer memory)
I/O data area for FDL address 2
(Buffer memory)
Table7.4 DP-Slave Settings (1st module)
Item
FDL address
I/O data size
Table7.5 DP-Slave Settings (2nd module)
Item
FDL address
I/O data size
7.1 I/O Data Exchange Program Examples
Table7.3 QJ71PB92V Settings
Input data area (for mode 3)
Output data area (for mode 3)
Input data area (for mode 3)
Output data area (for mode 3)
Input data size
Output data size
Input data size
Output data size
Description
FDL address 0
1.5 Mbps
Communication mode (mode 3)
6144 (1800 ) to 6239 (185F )
H H
14336 (3800 ) to
H
14431 (385F )
H
6240 (1860 )
H
14332 (3860 )
H
Description
FDL address 1
96 words (192 bytes)
96 words (192 bytes)
Description
FDL address 2
1 words (2 bytes)
1 words (2 bytes)
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