Segger J-Link User Manual page 479

A
Adaptive clocking ............................... 472
Application Program Interface .............. 472
B
Big-endian ........................................ 472
C
Cache cleaning .................................. 472
Coprocessor ...................................... 472
D
Dirty data ......................................... 472
Dynamic Linked Library (DLL) .............. 472
E
Embedded Trace Buffer (ETB) .......443, 472
Embedded Trace Macrocell (ETM) ..439, 472
EmbeddedICE ................................... 472
G
General Query Packets ....................... 110
H
Halfword ........................................... 472
Host ................................................. 472
I
ICache ............................................. 472
ICE Extension Unit ............................. 472
ID ................................................... 473
IEEE 1149.1 ...................................... 473
Image .............................................. 473
In-Circuit Emulator ............................ 473
Instruction Register ............................ 473
IR .................................................... 473
J
J-Flash ARM ...................................... 133
J-Link / J-Trace (UM08001)
Index
J-Link
Adapters ........................................434
Developer Pack DLL .........................155
Supported chips
282, .........................................286
J-Link Commander .............................. 71
J-Link GDB Server ............................... 92
J-Link RDI .........................................150
J-Link STR9 Commander .....................151
J-Link TCP/IP Server ...........................128
J-Mem Memory Viewer ........................132
Joint Test Action Group (JTAG) .............473
JTAG ................................................436
TAP controller ..................................437
JTAGLoad ..........................................149
L
Little-endian ......................................473
M
Memory coherency .............................473
Memory management unit (MMU) ........473
Memory Protection Unit (MPU) .............473
Menu structure ..................................302
Multi-ICE ..........................................473
N
nTRST ...................................... 418, 473
O
Open collector ...................................473
P
Processor Core ..................................474
Program Status Register (PSR) ............474
R
RDI Support ......................................150
Remapping ........................................474
Remote Debug Interface (RDI) .............474
RESET ..............................................473
© 2004-2017 SEGGER Microcontroller GmbH & Co. KG
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