Segger J-Link User Manual
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Segger J-Link User Manual

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Download this manual See also: Reference Manual
J-Link / J-Trace
User Guide
Software Version V6.14
Manual Rev. 0
Date: February 23, 2017
Document: UM08001
A product of SEGGER Microcontroller GmbH & Co. KG
www.segger.com

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Summary of Contents for Segger J-Link

  • Page 1 J-Link / J-Trace User Guide Software Version V6.14 Manual Rev. 0 Date: February 23, 2017 Document: UM08001 A product of SEGGER Microcontroller GmbH & Co. KG www.segger.com...
  • Page 2 Please make sure your manual is the latest edition. While the information herein is assumed to be accurate, SEGGER Microcontroller GmbH & Co. KG (the manufacturer) assumes no responsibility for any errors or omissions. The manufacturer makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you.
  • Page 3 160519 Chapter "Adding Support for New Devices" added. Chapter "Related Software" V5.12f Rev. 0 160503 * Section "J-Link RTT Viewer" updated and moved from section "RTT". Chapter "Working with J-Link and J-Trace" V5.12d Rev. 1 160427 * Section "J-Link script files" updated.
  • Page 4 V5.10 Rev. 0 151127 * Section "J-Scope" removed. Chapter "Working with J-Link and J-Trace" V5.02m Rev. 0 151125 * Section "The J-Link settings file" added. Chapter "Low Power Debugging" added. Various Chapters V5.02l Rev. 0 151123 * Some typos corrected.
  • Page 5 * Section "Silicon Labs - EFM32 series devices" added Chapter "Related Software" * Section "GDB Server" V4.86 Rev. 1 140527 Command line options -halt / -nohalt added. Description for GDB Server CL version added. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 6 Added command line option parameter to specify a customized scan-chain. Chapter "Working with J-Link" * Section "Virtual COM Port (VCOM) added. Chapter "Setup" * Section "Getting started with J-Link and DS-5" Chapter "Related Software" V4.82 Rev. 0 140218 * Section "GDB Server"...
  • Page 7 130124 * Section "9-pin JTAG/SWD connector" Pinout description corrected. Chapter "Intoduction" V4.58 Rev. 1 121206 * Section "J-Link / J-Trace models" updated. Chapter "Working with J-Link" * Section "J-Link script files" V4.58 Rev. 0 121126 Sub-section "Executing J-Link script files"...
  • Page 8 V4.36 Rev. 0 110909 * Section "J-Link script files" updated. Chapter "Introduction" V4.26 Rev. 1 110513 * Section "J-Link / J-Trace models" corrected. V4.26 Rev. 0 110427 Several corrections. Chapter "Introduction" * Section "J-Link / J-Trace models" corrected. V4.24 Rev. 1 110228 Chapter "Device specifics"...
  • Page 9 * Section "J-Link / J-Trace models" updated. Chapter "Introduction" * Section" Specifications" updated * Section "Hardware versions" updated 090828 * Section "Common features of the J-Link product family" updated Chapter "Target interfaces and adapters" * Section "5 Volt adapter" updated Chapter "Introduction"...
  • Page 10 * Section "Target board design for JTAG" 090108 updated. * Section "Target board design for SWD" added. Chapter "Working with J-Link Pro" 090105 * Section "Connecting J-Link Pro the first time" updated. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 11 * Section "Connecting multiple J-Links / J-Traces to your PC" updated. 080910 Chapter "Licensing" updated. Chapter "Licensing" added. Chapter "Hardware" 080904 Section "J-Link OEM versions" moved to chapter "Licensing" Chapter "Hardware" Section "JTAG+Trace connector" JTAG+Trace 080902 connector pinout corrected. Section "J-Link OEM versions" updated.
  • Page 12 Chapter "J-Link and J-Trace related software" 080215 Section "J-Link software and documentation package in detail" updated. Chapter "J-Link and J-Trace related software" Section "J-Link TCP/IP Server (Remote J-Link / J-Trace use)" updated. Chapter "Working with J-Link and J-Trace" Section "Command strings" updated. 080212 Chapter "Flash download and flash breakpoints"...
  • Page 13 070312 "Differences between different versions" supplemented. Chapter "J-Link / J-Trace related software": 070307 "J-Link GDB Server" licensing updated. Chapter "J-Link / J-Trace related software" updated and reorganized. 070226 Chapter "Hardware" "List of OEM products" updated Chapter "Device specifics" added 070221 Subchapter "Command strings"...
  • Page 14 060117 Screenshots updated. 051208 Chapter Working with J-Link: Sketch added. Chapter Working with J-Link: "Connecting multiple J-Links to your PC" added. Chapter Working with J-Link: "Multi core debug- 051118 ging" added. Chapter Background information: "J-Link firm- ware" added. 051103 Chapter Setup: "JTAG Speed" added.
  • Page 15 Reference to chapters, sections, tables and figures or other docu- Reference ments. GUIElement Buttons, dialog boxes, menu names, menu commands. Emphasis Very important sections. Table 1.1: Typographic conventions J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 16 Apart from its main focus on software tools, SEGGER develops and produces programming tools for flash micro controllers, as well as J-Link, a JTAG emulator to assist in develop- ment, debugging and production, which has rapidly become the industry standard for debug access to ARM cores.

  • Page 17: Table Of Contents

    J-Trace ARM ................... 42 1.3.9 J-Trace for Cortex-M ................43 1.3.10 Flasher ARM.................... 45 Common features of the J-Link product family ..........47 Supported CPU cores ................48 Built-in intelligence for supported CPU-cores ..........49 1.6.1 Intelligence in the J-Link firmware ............. 49 1.6.2...
  • Page 18 Command line options ................88 3.2.3 Using command files................91 J-Link GDB Server ................... 92 3.3.1 J-Link GDB Server CL (Windows, Linux, Mac) ..........92 3.3.2 Debugging with J-Link GDB Server ............93 3.3.3 Supported remote (monitor) commands ............. 98 3.3.4...
  • Page 19 4.7.4 Determining which DLL is used by a program ..........172 Getting started with J-Link and ARM DS-5..........173 4.8.1 Replacing the RDDI DLL manually ............173 4.8.2 Using J-Link in DS-5 Development Studio ..........173 5 Working with J-Link and J-Trace..................175 Connecting the target system..............
  • Page 20 Having servicing interrupts in debug mode ..........278 Forwarding of Monitor Interrupts ..............279 Target application performs reset (Cortex-M) ..........280 9 Low Power Debugging....................281 Introduction ..................282 Activating low power mode handling for J-Link ...........283 9.2.1 SEGGER Embedded Studio ..............283 9.2.2 Keil MDK-ARM..................283 9.2.3...
  • Page 21 SPI interface connection ................. 323 11.12 Support....................324 11.12.1 Troubleshooting ..................324 11.12.2 Contacting support ................324 12 RDI..........................325 12.1 Introduction..................326 12.1.1 Features....................326 12.2 Licensing ....................327 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 22 Do streaming trace without prior download ..........381 15 Device specifics ......................383 15.1 Analog Devices ..................384 15.1.1 ADuC7xxx .....................384 15.2 ATMEL ....................386 15.2.1 AT91SAM7 ....................387 15.2.2 AT91SAM9 ....................389 15.3 DSPGroup .....................390 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 23 Test access port (TAP)................436 17.1.2 Data registers ..................436 17.1.3 Instruction register ................436 17.1.4 The TAP controller ................. 437 17.2 Embedded Trace Macrocell (ETM)............. 439 17.2.1 Trigger condition ................... 439 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 24 J-Trace integration example - IAR Embedded Workbench for ARM....439 17.3 Embedded Trace Buffer (ETB) ..............443 17.4 Flash programming ................444 17.4.1 How does flash programming via J-Link / J-Trace work? ......444 17.4.2 Data download to RAM ................444 17.4.3 Data download via DCC................444 17.4.4 Available options for flash programming ............444...
  • Page 25 20.4 Frequently Asked Questions ..............470 21 Glossary........................471 22 Literature and references...................477 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 26 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 27: Introduction

    Chapter 1 Introduction This chapter gives a short overview about J-Link and J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 28: Requirements

    Introduction Requirements Host System To use J-Link or J-Trace you need a host system running Windows 2000 or later. For a list of all operating systems which are supported by J-Link, please refer to Supported OS on page 29. Target System A target system with a supported CPU is required.

  • Page 29: Supported Os

    Supported OS J-Link/J-Trace can be used on the following operating systems: • Microsoft Windows 2000 • Microsoft Windows XP • Microsoft Windows XP x64 • Microsoft Windows Vista • Microsoft Windows Vista x64 • Windows 7 • Windows 7 x64 •...

  • Page 30: J-Link / J-Trace Models

    J-Links / J-Traces have the hardware version printed on the back label. If this is not the case with your J-Link / J-Trace, start JLink.exe. As part of the initial message, the hardware version is displayed.

  • Page 31: Model Comparison

    A9/R4 JTAG ETM Trace Software features Software features are features implemented in the software running on the host. Software features can either come with the J-Link or be added later using a license string from Segger. J-Trace J-Link J-Link J-Link...

  • Page 32: J-Link Base

    Introduction 1.3.2 J-Link BASE J-Link BASE is a JTAG emulator designed for ARM cores. It con- nects via USB to a PC running Microsoft Windows 2000 or later. For a complete list of all operating systems which are sup- ported, please refer to Supported OS on page 29. J-Link BASE has a built-in 20-pin JTAG connector, which is compatible with the standard 20-pin connector defined by ARM.
  • Page 33 5V target supply (pin 19) of Kick-Start versions of J-Link is current monitored and limited. J-Link automatically switches off 5V supply in case of over-current to protect both J-Link and host computer. Peak current (<= 10 ms) limit is 1A, operating current limit is 300mA.

  • Page 34: J-Link Plus

    • Pin 1 (VTref) is used for measuring target reference voltage only. Buffers on J- Link side are no longer powered through this pin but via the J-Link internal volt- age supplied via USB. 1.3.2.4 Software and Hardware Features Overview...
  • Page 35 10 kOhm JTAG/SWD Interface, Timing SWO sampling frequency Max. 7.5 MHz Data input rise time (T <= 20ns Data input fall time (T <= 20ns Table 1.2: J-Link specifications J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 36 • Pin 1 (VTref) is used for measuring target reference voltage only. Buffers on J- Link side are no longer powered through this pin but via the J-Link internal volt- age supplied via USB. 1.3.3.4 Software and Hardware Features Overview...

  • Page 37: J-Link Ultra

    CPU core etc. 1.3.4.2 Specifications The following table gives an overview about the specifications (general, mechanical, electrical) for J-link ULTRA+. All values are valid for J-link ULTRA hardware version 1. Note: Some specifications, especially speed, are likely to be improved in the future with newer versions of the J-Link software (freely available).
  • Page 38 Identical to version 4 with the following exception: Pin 1 (VTref) is used for measuring target reference voltage only. Buffers on J-Link side are no longer powered through this pin but via the J-Link internal voltage sup- plied via USB.

  • Page 39: J-Link Pro

    • Pin 1 (VTref) is used for measuring target reference voltage only. Buffers on J- Link side are no longer powered through this pin but via the J-Link internal volt- age supplied via USB. 1.3.5.3 Software and Hardware Features Overview...
  • Page 40 Standard 20-pin 0.1 inch JTAG connector (compatible to J-Link) 1.3.6.2 Specifications The following table gives an overview about the specifications (general, mechanical, electrical) for J-Link Lite ARM. All values are valid for J-Link hardware version 8. General For a complete list of all operating sys-...

  • Page 41: J-Link Lite Cortexm

    1.3.7 J-Link Lite CortexM J-Link Lite CortexM is a specific OEM-version of SEGGER J-Link Lite which is designed to be used with Cortex-M devices. If you are selling evaluation-boards, J-Link Lite CortexM is an inex- pensive emulator solution for you. Your customer receives a widely acknowledged JTAG/SWD-emulator which allows to start right away with development.

  • Page 42: J-Trace Arm

    CHAPTER 1 Introduction 1.3.7.2 Software and Hardware Features Overview For detailed information about hardware and software features of your J-Link/J-Trace model and version see: https://wiki.segger.com/Software_and_Hardware_Features_Overview 1.3.8 J-Trace ARM The J-Trace ARM model is an older J-Trace model that has been discontinued. It is referenced here for completeness.

  • Page 43: J-Trace For Cortex-M

    J-Trace for Cortex-M is a JTAG/SWD emulator designed for Cor- tex-M cores which includes trace (ETM) support. J-Trace for Cortex-M can also be used as a J-Link and it also supports ARM7/9 cores. Tracing on ARM7/9 targets is not supported.
  • Page 44 Voltage range for trace signals extended to 1.2 - 3.3 V • Higher download speed 1.3.9.5 Software and Hardware Features Overview For detailed information about hardware and software features of your J-Link/J-Trace model and version see: • https://wiki.segger.com/Software_and_Hardware_Features_Overview J-Link / J-Trace (UM08001)

  • Page 45: Flasher Arm

    J-Flash soft- ware or stand-alone. In addition to that Flasher ARM has all of the J-Link functionality. For more information about Flasher ARM, please refer to UM08007, Flasher ARM User’s Guide. 1.3.10.1 Specifications The following table gives an overview about the specifications (general, mechanical, electrical) for Flasher ARM.
  • Page 46 Min. 2.85V load of 10 kOhm Table 1.8: Flasher ARM specifications 1.3.10.2 Software and Hardware Features Overview For detailed information about hardware and software features of your J-Link/J-Trace model and version see: https://wiki.segger.com/Software_and_Hardware_Features_Overview J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 47: Common Features Of The J-Link Product Family

    Memory viewer (J-Mem) included • Remote server included, which allows using J-Trace via TCP/IP networks • RDI interface available, which allows using J-Link with RDI compliant software • Flash programming software (J-Flash) available • Flash DLL available, which allows using flash functionality in custom applications •...

  • Page 48: Supported Cpu Cores

    CHAPTER 1 Introduction Supported CPU cores J-Link / J-Trace has been tested with the following cores, but should work with any ARM7/9/11, Cortex-M0/M1/M3/M4 and Cortex-A5/A8/A9/R4 core. If you experience problems with a particular core, do not hesitate to contact Segger.

  • Page 49: Built-In Intelligence For Supported Cpu-Cores

    CPU-core. If intelligence in the firmware is available, it is used. If you are using a J-Link that does not have intelligence in the firmware and only PC-side intelligence is available for the connected CPU, a warning message is shown.
  • Page 50 Instability, especially on slow targets Due to the fact that a lot of USB transactions would cause a very bad perfor- mance of J-Link, PC-side implementations are on the assumption that the CPU/ Debug interface is fast enough to handle the commands/requests without the need of waiting.

  • Page 51: Firmware Intelligence Per Model

    1.6.3 Firmware intelligence per model There are different models of J-Link / J-Trace which have built-in intelligence for dif- ferent CPU-cores. In the following, we will give you an overview about which model of J-Link / J-Trace has intelligence for which CPU-core.
  • Page 52 CHAPTER 1 Introduction 1.6.3.2 Older models The table below lists the firmware CPU support for older J-Link & J-Trace models which are not sold anymore. Cortex- Renesas Cortex-M J-Link / J-Trace RX600 model JTAG JTAG JTAG JTAG JTAG not sup- J-Link "...

  • Page 53: Supported Ides

    J-Link / J-Trace can be used with different IDEs. Some IDEs support J-Link directly, for other ones additional software (such as J-Link RDI) is necessary in order to use J- Link. The following tables list which features of J-Link / J-Trace can be used with the different IDEs.
  • Page 54 CHAPTER 1 Introduction J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 55: Licensing

    Chapter 2 Licensing This chapter describes the different license types of J-Link related software and the legal use of the J-Link software with original SEGGER and OEM products. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 56 CHAPTER 2 Licensing Components requiring a license The following programs/features require a full-featured J-Link (PLUS, ULTRA+, PRO, J-Trace) or an additional license for the J-Link base model: • J-Flash • J-Link RDI • J-Link Debugger • Flash breakpoints (FlashBP) J-Link / J-Trace (UM08001)

  • Page 57: Built-In License

    Link PLUS, J-Link ULTRA+ and J-Link Pro. Key-based license This type of license is used if you already have a J-Link, but order a license for a J- Link software component at a later time. In addition to that, the key-based license is used for trial licenses.

  • Page 58: Legal Use Of Segger J-Link Software

    Use of software SEGGER J-Link software may only be used with original SEGGER products and autho- rized OEM products. The use of the licensed software to operate SEGGER product clones is prohibited and illegal.

  • Page 59: Original Segger Products

    Original SEGGER products All of the follwing SEGGER products are supported by the OSs stated in Chapter 1.2 Supported OS The following products are original SEGGER products for which the use of the J-Link software is allowed: 2.4.1 J-Link BASE J-Link BASE is a JTAG emulator designed for ARM cores.

  • Page 60: J-Link Ultra

    J-link ULTRA+ is a JTAG/SWD emulator designed for ARM/Cor- tex and other supported CPUs. It is fully compatible to the stan- dard J-Link and works with the same PC software. Based on the highly optimized and proven J-Link, it offers even higher speed as well as target power measurement capabilities due to the faster CPU, built-in FPGA and High speed USB interface.

  • Page 61: J-Trace For Cortex-M

    2.4.5 J-Trace for Cortex-M J-Trace for Cortex-M is a JTAG/SWD emulator designed for Cor- tex-M cores which include trace (ETM) support. J-Trace for Cor- tex-M can also be used as a regular J-Link. Included Licenses J-Link Flashloaders J-Link GDB Server...

  • Page 62: Flasher Arm

    Renesas RX core. Flasher RX is designed for programming flash targets with the J-Flash software or stand-alone. In addition to that Flasher RX has all of the J-Link RX functionality. Flasher RX connects via Ethernet, USB or via RS232 interface to a PC run- ning Microsoft Windows 2000 or later.

  • Page 63: Flasher Ppc

    J-Flash soft- ware or stand-alone. In addition to that Flasher PPC has all of the J-Link functionality. Flasher PPC connects via USB or via RS232 interface to a PC running Microsoft Windows 2000 or later.

  • Page 64: J-Link Oem Versions

    Licensing J-Link OEM versions There are several different OEM versions of J-Link on the market. The OEM versions look different, but use basically identical hardware. Some of these OEM versions are limited in speed, some can only be used with certain chips and some of these have certain add-on features enabled, which normally requires a license.

  • Page 65: Digi: Jtag Link

    Limitations Digi JTAG Link works with Digi devices only. This limitation can NOT be lifted; if you would like to use J-Link with a device from an other manufacturer, you need to buy a separate J-Link. Licenses License for GDB Server is included. Other licenses can be added.

  • Page 66: Iar: J-Trace

    No licenses are included. All licenses can be added. Note J-Link Lite ARM is only delivered and supported as part of Starter Kits. It is not sold to end customers and not guaranteed to work with custom hardware. J-Link / J-Trace (UM08001)

  • Page 67: J-Link Obs

    J-Link OBs J-Link OBs (J-Link On Board) are single chip versions of J-Link which are used on var- ious evalboards. It is legal to use J-Link software with these boards. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 68: Illegal Clones

    The use of illegal J-Link clones with this software is a violation of US, European and other international laws and is prohibited. If you are in doubt if your unit may be legally used with SEGGER J-Link software, please get in touch with us.

  • Page 69: J-Link Software And Documentation Package

    Chapter 3 J-Link software and documenta- tion package This chapter describes the contents of the J-Link software and documentation pack- age which can be downloaded from www.segger.com. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 70: Software Overview

    Included are: STR9 Commander and STM32 Unlock. Table 3.1: J-Link / J-Trace related software a. Full-featured J-Link (PLUS, PRO, ULTRA+) or an additional license for J-Link base model required. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 71: J-Link Commander (Command Line Tool)

    J-Link Commander (Command line tool) J-Link Commander (JLink.exe) is a tool that can be used for verifying proper instal- lation of the USB driver and to verify the connection to the target CPU, as well as for simple analysis of the target system. It permits some simple commands, such as memory dump, halt, step, go etc.

  • Page 72: Commands

    J-Link software and documentation package 3.2.1 Commands The table below lists the available commands of J-Link Commander. All commands are listed in alphabetical order within their respective categories. Detailed descrip- tions of the commands can be found in the sections that follow.
  • Page 73 Read and display file from emulator. fshow Display size of file on emulator. fsize (fsz) Write file to emulator. fwrite (fwr) Connection Connect to J-Link Pro via TCP/IP. Connect to J-Link via USB. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 74 0x2 3.2.1.3 device Selects a specific device J-Link shall connect to and performs a reconnect. In most cases explicit selection of the device is not necessary. Selecting a device enables the user to make use of the J-Link flash programming functionality as well as using unlimited breakpoints in flash memory.
  • Page 75 Command Example exec SupplyPower = 1 3.2.1.6 exit (qc, q) This command closes the target connection, the connection to the J-Link and exits J- Link Commander. Syntax 3.2.1.7 exitonerror (eoe) This command toggles whether J-Link Commander exits on error or not.
  • Page 76 On emulators which support file I/O this command gets the size of a specific file. Cur- rently, only Flasher models support file I/O. Syntax fsize <FileName>] Parameter Meaning Source file name to read from the Flasher. FileName Example fsize Flasher.dat J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 77 Syntax halt 3.2.1.17 hwinfo This command can be used to get information about the power consumption of the target (if the target is powered via J-Link). It also gives the information if an over- current happened. Syntax hwinfo J-Link / J-Trace (UM08001)
  • Page 78 CHAPTER 3 J-Link software and documentation package 3.2.1.18 ip Closes any existing connection to J-Link and opens a new one via TCP/IP. If no IP Address is specified, the Emulator selection dialog shows up. Syntax ip [<Addr>] Parameter Meaning Valid values:...
  • Page 79 0, 100 3.2.1.25 mem32 The command reads memory from the target system in units of 32-bits. If necessary, the target CPU is halted in order to read memory. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 80 3 3.2.1.28 ms Measures the number of bits in the specified scan chain. Syntax ms <ScanChain> Parameter Meaning Scan chain to be measured. ScanChain Example ms 1 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 81 This command sets the status of the power supply over pin 19 of the JTAG connector. The KS(Kickstart) versions of J-Link have the 5V supply over pin 19 activated by default. This feature is useful for some targets that can be powered over the JTAG connector.
  • Page 82 (MMU) or the external bus interface. Syntax rx <DelayAfterReset> Parameter Meaning DelayAfter- Delay in ms. Reset Example rx 10 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 83 Moreover the bits DBGEXT, CHAIN and the J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 84 This command sets the speed for communication with the CPU core. Syntax speed <Freq>|auto|adaptive Parameter Meaning Specifies the interface frequency in kHz. Freq Selects auto detection of JTAG speed. auto Selects adaptive clocking as JTAG speed. adaptive J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 85 DeviceName Kinetis EFM32Gxxx Example unlock Kinetis 3.2.1.46 usb Closes any existing connection to J-Link and opens a new one via USB. It is possible to select a specific J-Link by port number. Syntax usb [<Port>] Parameter Meaning Valid values: 0..3...
  • Page 86 The command writes a unit of 32-bits to the target system. Syntax w4 [<Zone>:]<Addr>, <Data> (hex) Parameter Meaning Name of memory zone to access. Zone Start address. Addr 32-bits of data to write. Data Example w4 0x0, 0xAABBCCFF J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 87 Writes into a register. The value is written into the register on CPU start. Syntax wreg <RegName>, <Data> Parameter Meaning Register to write to. RegName Data to write to the specified register. Data Example wreg R14, 0xFF J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 88: Command Line Options

    Selects a command file and starts J-Link Commander in batch mode. The batch mode of J-Link Commander is similar to the execution of a batch file. The command file is parsed line by line and one command is executed at a time.
  • Page 89 (eoe) 3.2.2.6 -If Selects the target interface J-Link shall use to connect to the target. By default, J- Link Commander first tries to connect to the target using the target interface which is currently selected in the J-Link firmware. If connecting fails, J-Link Commander goes through all target interfaces supported by the connected J-Link and tries to connect to the device.
  • Page 90 -RTTTelnetPort <Port> Example JLink.exe -RTTTelnetPort 9100 3.2.2.12 -SettingsFile Select a J-Link settings file to be used for the target device. The settings file can con- tain all configurable options of the Settings tab in J-Link Control panel. Syntax -SettingsFile <PathToFile>...

  • Page 91: Using Command Files

    3.2.3 Using command files J-Link commander can also be used in batch mode which allows the user to use J- Link commander for batch processing and without user interaction. Please do not confuse command file with J-Link script files (please refer to J-Link script files on page 206 for more information about J-Link script files).

  • Page 92: J-Link Gdb Server

    IDEs like emIDE or Eclipse. J-Link GDB Server is a remote server for GDB making it possible for GDB to connect to and communicate with the target device via J-Link. GDB Server and GDB commu- nicate via a TCP/IP connection, using the standard GDB remote protocol.

  • Page 93: Debugging With J-Link Gdb Server

    If the target device option (-device) is given, the configuration dialog will not pop 3.3.2.2 Setting up GDB Server CL version The command line version of GDB Server is part of the J-Link Software Package for all supported platforms. On Windows its name is JLinkGDBServerCL.exe, on Linux and Mac it is JLinkGDB- Server.
  • Page 94 Stay on top • Show log window. • Generate logfile: If checked, a log file with the GDB <-> GDB Server <-> J-Link communication will be created. • Verify download: If checked, the memory on the target will be verified after download.
  • Page 95 GDB Server on start of the debug session. If it does not, or an older version of GDB Server starts, in emIDE click on JLink -> Run the JLink-plugin configuration. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 96 GDB. Within GDB all GDB commands and the remote monitor commands are available. For more information about debugging with GDB refer to its online manual available at http://sourceware.org/gdb/current/onlinedocs/gdb/. A typical startup of a debugging session can be like: J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 97 Refer to http://www.eclipse.org for detailed information about Eclipse. Note: We only support problems directly related to the GDB Server. Problems and questions related to your remaining toolchain have to be solved on your own. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 98: Supported Remote (Monitor) Commands

    3.3.3 Supported remote (monitor) commands J-Link GDB Server comes with some functionalities which are not part of the standard GDB. These functions can be called either via a gdbinit file passed to GDB Server or via monitor commands passed directly to GDB, forwarding them to GDB Server.
  • Page 99 -device instead. Select the target interface. interface Note: Use command line option instead. Sets the JTAG speed of J-Link / J-Trace. Note: For the initial connection speed, use com- speed mand line option instead. -speed Table 3.4: GDB remote commands Note: The remote commands are case-insensitive.
  • Page 100 Note: The device should be selected via commandline option -device when starting GDB Server. Example > monitor device STM32F417IG < Selecting device: STM32F417IG 3.3.3.4 DisableChecks Syntax DisableChecks J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 101 #No arguments set via setargs: > monitor getargs < No arguments. #Arguments set via setargs: > monitor getargs < Arguments: test 0 1 2 arg0=4 3.3.3.8 go Syntax J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 102 Deprecated. Use command line option instead. Syntax interface <InterfaceIdentifier> Description Selects the target interface used by J-Link / J-Trace. 3.3.3.11 jtagconf Syntax jtagconf <IRPre> <DRPre> Description Configures a JTAG scan chain with multiple devices on it. <IRPre> is the sum of IRLens of all devices closer to TDI, where IRLen is the number of bits in the IR (Instruction Register) of one device.
  • Page 103 If <address> is specified, this command writes the memory content at address <address> to register <RegName>. Otherwise this com- mand reads the given register. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 104 Add. information There are different reset strategies for different CPUs. Moreover, the reset strategies which are available differ from CPU core to CPU core. J-Link can perform various reset strategies and always selects the best fitting strategy for the selected device.
  • Page 105 #Select TELNET port and GDB as output source > monitor semihosting ioclient 3 < Semihosting I/O set to TELNET and GDB Client 3.3.3.21 semihosting ARMSWI Syntax semihosting ARMSWI <Value> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 106 If no mask is given, an ARM instruction breakpoint will be set. Example #Set a breakpoint (implicit for ARM instructions) > monitor setbp 0x00000000 #Set a breakpoint on a THUMB instruction > monitor setbp 0x00000100 0x01 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 107 <kHz>|auto|adaptive Description Sets the JTAG speed of J-Link / J-Trace. Speed can be either fixed (in kHz), automatic recognition or adaptive. In general, Adaptive is recommended if the target has an RTCK signal which is connected to the corresponding RTCK pin of the device (S-cores only).
  • Page 108 SWO EnableTarget <CPUFreq[Hz]> <SWOFreq[Hz]> <PortMask[0x01-0xFFFFFFFF] <Mode[0]> Description Configures the target to be able to output SWO data and starts J-Link to capture it. CPU and SWO frequency can be 0 for auto-detection. If CPUFreq is 0, J-Link will measure the current CPU speed.
  • Page 109 Syntax SWO GetSpeedInfo Description Prints the base frequency and the minimum divider of the connected J-Link. With this information, the available SWO speeds for J-Link can be calculated and the matching one for the target CPU frequency can be selected.

  • Page 110: Segger-Specific Gdb Protocol Extensions

    3.3.4 SEGGER-specific GDB protocol extensions J-Link GDB Server implements some functionality which are not part of the standard GDB remote protocol in general query packets. These SEGGER-specific general query packets can be sent to GDB Server on the low-level of GDB, via maintanace com- mands, or with a custom client connected to GDB Server.
  • Page 111 Configures STRACE for usage. Configuration for example includes specification of the trace port width to be used for tracing (1-bit, 2-bit, 4-bit (default) Port- Width=%Var%. Note: For more information please refer to UM08002 (J-Link SDK user guide), chapter STRACE. Response <ReturnValue>...
  • Page 112 Description Read the last recently called instruction addresses. The addresses are returned LIFO, meaning the last recent address is returned first. Note: For more information please refer to UM08002 (J-Link SDK user guide), chapter STRACE. Response <ReturnValue>[<Item0><Item1>...] ReturnValue is a 4 Byte signed integer.
  • Page 113 Returns the amount of available bytes in the buffer. Response <ReturnValue> ReturnValue is the hexadecimal number of bytes in the buffer or empty on error. 3.3.4.9 qSeggerSWO:GetSpeedInfo Syntax qSeggerSTRACE:GetSpeedInfo:<Enc> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 114 Enc: Encoding type, only 0 ("UART encoding") is allowed. Hexadecimal. Description Returns the base frequency and the minimum divider of the connected J-Link. With this information, the available SWO speeds for J-Link can be calculated and the matching one for the target CPU frequency can be selected.

  • Page 115: Command Line Options

    3.3.5 Command line options There are several command line options available for the GDB Server which allow configuration of the GDB Server before any connection to a J-Link is attempted or any connection from a GDB client is accepted. Note:...
  • Page 116 Selects a RTOS plugin (DLL file) -rtos Starts GDB Server in single run mode. -singlerun Uses a J-Link scriptfile. -scriptfile Selects the interface to connect to J-Link (USB/IP). -select Selects the J-Link Settings File. -settingsfile Starts GDB Server in strict mode. -strict Executes a gdb file on first connection.
  • Page 117 3.3.5.2 -device Description Tells GDBServer to which device J-Link is connected before the connect sequence is actually performed. It is recommended to use the command line option to select the device instead of using the remote command since for some devices J-Link already needs to know the device at the time of connecting to it since some devices need special connect sequences (e.g.
  • Page 118 Example jlinkgdbserver -endian little 3.3.5.4 -if Description Selects the target interface which is used by J-Link to connect to the device. The default value is JTAG. Note: Using GDB Server CL this option is mandatory to correctly connect to the target, and should be given before connection via GDB.
  • Page 119 The file will be created if it does not exist. If it exists the previous content will be removed. Paths including spaces need to be set between quotes. Syntax -log <LogFilePath> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 120 Same as -localhostonly 0 Note: For the GUI version, this setting is persistent for following uses of GDB Server until changed via command line option or the GUI. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 121 Server until changed via command line option or the GUI. Syntax -nosilent 3.3.5.17 -nostayontop Description Starts the GDB Server in non-topmost mode. All windows can be placed above it. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 122 This command line option prevents GDB Server from closing, to allow connecting a target after starting GDB Server. Note: The recommended order is to power the target, connect it to J-Link and then start GDB Server. Syntax -notimeout 3.3.5.19 -novd...
  • Page 123 3.3.5.24 -settingsfile Description Select a J-Link settings file to be used for the target device. The settings fail can con- tain all configurable options of the Settings tab in J-Link Control panel. Syntax -SettingsFile <PathToFile>...
  • Page 124 In normal run mode GDB Server will stay open and wait for new connections. When started in single run mode GDB Server will close immediately when connecting to the target fails. Make sure it is powered and connected to J-Link before starting GDB Server.
  • Page 125 Note: The recommended order is to power the target, connect it to J-Link and then start GDB Server. Syntax -timeout <Timeout[ms]> Example Allow target connection within 10 seconds. jlinkgdbserver -timeout 10000 3.3.5.30 -strict Description Starts GDB Server in sctrict mode. When strict mode is active GDB Server checks the correctness of settings and exits in case of a failure.

  • Page 126: Program Termination

    3.3.6 Program termination J-Link GDB Server is normally terminated by a close or Ctrl-C event. When the single run mode is active it will also close when an error occurred during start or after all connections to GDB Server are closed.

  • Page 127: Semihosting

    Table 3.11: GDB Server exit codes 3.3.7 Semihosting Semihosting can be used with J-Link GDBServer and GDB based debug environments but needs to be explicitly enabled. For more information, please refer to Enabling semihosting in J-Link GDBServer on page 463.

  • Page 128: J-Link Remote Server

    J-Link Remote Server allows using J-Link / J-Trace remotely via TCP/IP. This enables you to connect to and fully use a J-Link / J-Trace from another computer. Perfor- mance is just slightly (about 10%) lower than with direct USB connection.

  • Page 129: Tunneling Mode

    Because there is only one prototype, a shipment to SEGGER is not possible. Instead the vendor can connect the device via J-Link to a local computer and start the Remote server in tunneling mode. The serial number of the J-Link is then sent to a to an engineer at SEGGER.
  • Page 130 J-Link software and documentation package Start J-Link Remote Server in tunneling mode Connect to the J-Link / J-Trace via J-Link commander J-Link Commander can be used to verify a connection to the J-Link can be estab- lished as follows: Start J-Link Commander From within J-Link Commander enter ip tunnel:<SerialNo>...
  • Page 131 To test whether a connection to the tunnel server can be established or not a network protocol analyzer like Wireshark can help. The network transfer of a successful connection should look like: J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 132: J-Mem Memory Viewer

    SFRs can be written. You can choose between 8/16/32-bit size for read and write accesses. J-Mem works nicely when modifying SFRs, especially because it writes the SFR only after the complete value has been entered. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 133: J-Flash

    J-Flash is an application to program data images to the flash of a target device. With J-Flash the internal flash of all J-Link supported devices can be programmed, as well as common external flashes connected to the device. Beside flash programming all other flash operations like erase, blank check and flash content verification can be done.

  • Page 134: J-Link Rtt Viewer

    CHAPTER 3 J-Link software and documentation package J-Link RTT Viewer J-Link RTT Viewer is a Windows GUI application to use all features of RTT in one application. It supports: • Displaying terminal output of Channel 0. • Up to 16 virtual Terminals on Channel 0.

  • Page 135: Connection Settings

    Select USB or TCP/IP as the connection to J-Link. For USB a specific J-Link serial number can optionally be entered, for TCP/IP the IP or hostname of the J-Link has to be entered. Select the target device to connect to. This allows J-Link to search in the known RAM of the target.

  • Page 136: Sending Input

    The output of Channel 0 can be logged into a text file. The format is the same as used in the All Terminals tab. Terminal Logging can be started via Logging -> Start Terminal Logging... J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 137: Logging Data

    --connection <usb|ip|sess> Example JLinkRTTViewer.exe --connection ip 3.7.7.3 --interface Sets the interface J-Link shall use to connect to the target. As interface types FINE, JTAG and SWD are supported. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 138 Example JLinkRTTViewer.exe --interface swd 3.7.7.4 --host Enter the IP address or hostname of the J-Link. This option only applies, if connection type IP is used. Use * as <IPAddr> for a list of available J-Links in the local subnet. Syntax --host <IPAddr>...

  • Page 139: Menus And Shortcuts

    Example JLinkRTTViewer.exe -rttaddr 0x20000000 3.7.7.8 --rttrange Sets one or more memory ranges, where the J-Link DLL shall search for the RTT con- trol block. Syntax --rttrange <RangeStart[Hex]> <RangeSize >[, <Range1Start [Hex]> <Range1Size>]> Example JLinkRTTViewer.exe -rttrange "20000000 400" 3.7.7.9 --autoconnect Let J-Link RTT Viewer connect automatically to the target without showing the Con- nection Settings (see Connection Settings on page 135).
  • Page 140 Shows version info of RTT Viewer. -> About... Opens the J-Link Manual PDF file. -> J-Link Manual... Opens the RTT webpage. -> RTT Webpage... Table 3.15: RTT Viewer Menus and Shortcuts J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 141: Using "Virtual" Terminals In Rtt

    RTT_CTRL_RESET, RTT_CTRL_BG_BRIGHT_RED, RTT_CTRL_TEXT_BRIGHT_WHITE, 1111111 // Clear the terminal. // The first line will not be shown after this command. SEGGER_RTT_WriteString(0, RTT_CTRL_CLEAR); SEGGER_RTT_printf(0, "%sTime: %s%s%.7d\n", RTT_CTRL_RESET, RTT_CTRL_BG_BRIGHT_RED, RTT_CTRL_TEXT_BRIGHT_WHITE, 2222222 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 142: J-Link Swo Viewer

    Command line-only version of SWO Viewer. All commands avaible for J-Link SWO Viewer can be used with J-Link SWO Viewer Cl. Similar to the GUI Version,J-Link SWO Viewer Cl asks for a device name or CPU clock speed at startup to be able to...

  • Page 143: Usage

    3.8.2 List of available command line options J-Link SWO Viewer can also be controlled from the command line if used in a auto- mated test environment etc. When passing all necessary information to the utility via command line, the configu- ration dialog at startup is suppressed.
  • Page 144 Example -settingsfile "C:\Temp\Settings.jlink" 3.8.2.7 swofreq Define the SWO frequency that shall be used by J-Link SWO Viewer for sampling SWO data. Usually not necessary to define since optimal SWO speed is calculated automatically based on the CPU frequency and the capabilities of the connected J-Link.

  • Page 145: Configure Swo Output After Device Reset

    Target example code for terminal output /********************************************************************* SEGGER MICROCONTROLLER GmbH & Co KG Solutions for real time microcontroller applications ********************************************************************** (c) 2012-2013 SEGGER Microcontroller GmbH & Co KG www.segger.com Support: support@segger.com J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 146 // Check if stimulus port is enabled if ((ITM_ENA & 1) == 0) { return; // Wait until STIMx is ready, // then send data while ((ITM_STIM_U8 & 1) == 0); ITM_STIM_U8 = c; J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 147 /********************************************************************* SWO_PrintString() * Function description Print a string via SWO. void SWO_PrintString(const char *s) { // Print out character per character while (*s) { SWO_PrintChar(*s++); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 148: Swo Analyzer

    Usage SWOAnalyzer.exe <SWOfile> This can be achieved by simply dragging the SWO output file created by the J-Link DLL onto the executable. Creating an SWO output file In order to create the SWO output file, which is th input file for the SWO Analyzer, the J-Link config file needs to be modified.

  • Page 149: Jtagload (Command Line Tool)

    SVD files allow even more complex tasks, basically everything which is possible via JTAG and the devices in the scan chain, like configuring an FPGA or loading data into memory. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 150: J-Link Rdi (Remote Debug Interface)

    J-Link software and documentation package 3.11 J-Link RDI (Remote Debug Interface) The J-Link RDI software is a remote debug interface for J-Link. It makes it possible to use J-Link with any RDI compliant debugger. The main part of the software is an RDI- compliant DLL, which needs to be selected in the debugger.

  • Page 151: Processor Specific Tools

    Selects a command file and starts J-Link STR91x Commander in batch mode. The batch mode of J-Link Commander is similar to the execution of a batch file. The com- mand file is parsed line by line and one command is executed at a time.

  • Page 152: J-Link Stm32 Unlock (Command Line Tool)

    To select from a list of all available emulators on Ethernet, please use * as <IPAddr>. -SelectEmuBySN Connect to a J-Link with a specific serial number via USB. Useful if multiple J-Links are connected to the same PC and multiple instances of J-Link STR91x Commander shall run and each connects to another J-Link.
  • Page 153 Additional information To select from a list of all available emulators on Ethernet, please use * as <IPAddr>. -SelectEmuBySN Connect to a J-Link with a specific serial number via USB. Useful if multiple J-Links are connected to the same PC. Syntax -SelectEmuBySN <SerialNo>...
  • Page 154 JLinkSTM32.exe -SetDeviceFamily STM32L1xxxx // Selects STM32L1 series -Exit In general, the J-Link STM32 utility waits at the end of the unlock process for any user input before application closes. This option allows to skip this step, so that the utility closes automatically.

  • Page 155: J-Link Software Developer Kit (Sdk)

    The J-Link Software Developer Kit is needed if you want to write your own program with J-Link / J-Trace. The J-Link DLL is a standard Windows DLL typically used from C programs (Visual Basic or Delphi projects are also possible). It makes the entire...
  • Page 156 CHAPTER 3 J-Link software and documentation package J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 157: Setup

    Chapter 4 Setup This chapter describes the setup procedure required in order to work with J-Link / J- Trace. Primarily this includes the installation of the J-Link software and documenta- tion package, which also includes a kernel mode J-Link USB driver in your host sys- tem.

  • Page 158: Installing The J-Link Software And Documentation Pack

    J-Link USB driver. Some of the applications require an additional license, free trial licenses are available upon request from www.segger.com. Refer to chapter J-Link software and documentation package on page 69 for an over- view of the J-Link software and documentation pack. 4.1.1...
  • Page 159 Next > button. The Choose options dialog is opened. The Install J-Link Serial Port Driver installs the driver for J-Links with CDC functionality. It is not preselected since J-Links without CDC functionality do not need this driver.
  • Page 160 Setup The installation process will start. The J-Link DLL Updater pops up, which allows you to update the DLL of an installed IDE to the DLL verion which is included in the installer. For further infor- mation about the J-Link DLL updater, please refer to J-Link DLL updater on page 171.

  • Page 161: Setting Up The Usb Interface

    In addition you can verify the driver installation by consulting the Windows device manager. If the driver is installed and your J-Link / J-Trace is connected to your com- puter, the device manager should list the J-Link USB driver as a node below "Univer- sal Serial Bus controllers"...

  • Page 162: Uninstalling The J-Link Usb Driver

    4.2.2 Uninstalling the J-Link USB driver If J-Link / J-Trace is not properly recognized by Windows and therefore does not enu- merate, it makes sense to uninstall the J-Link USB driver. This might be the case when: •...
  • Page 163 (jlink) USB and click the Change/Remove button. Confirm the uninstallation process. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 164: Setting Up The Ip Interface

    J-Link Configurator which auto-detects all J-Links that are connected to the host PC via USB & Ethernet. The J-Link Configurator allows the user to setup the IP interface of J-Link. For more information about how to use the J-Link Configurator, please refer to J-Link Configurator on page 167.
  • Page 165 The Network configuration page allows configuration of network related settings (IP address, subnet mask, default gateway) of J-Link. The user can choose between automatic IP assignment (settings are provided by a DHCP server in the network) and manual IP assignment by selecting the appropriate radio button.

  • Page 166: Faqs

    Setup FAQs How can I use J-Link with GDB and Ethernet? You have to use the J-Link GDB Server in order to connect to J-Link via GDB and Ethernet. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 167: J-Link Configurator

    PC. This is the default identification method for current J- Links (J-Link with hardware version 8 or later). For re-configuration of old J-Links or for configuration of the IP settings (use DHCP, IP address, subnet mask, ...) of a J- Link supporting the Ethernet interface, SEGGER provides a GUI-based tool, called J- Link Configurator.
  • Page 168 CHAPTER 4 Setup In order to configure an old J-Link, which uses the old USB 0 - 3 USB identification method, to use the new USB identification method (reporting the real serial number) simply select "Real SN" as USB identification method and click the OK button. The same dialog also allows configuration of the IP settings of the connected J-Link if it supports the Ethernet interface.

  • Page 169: J-Link Usb Identification

    J-Link USB identification In general, when using USB, there are two ways in which a J-Link can be identified: • By serial number • By USB address Default configuration of J-Link is: Identification by serial number. Identification via USB address is used for compatibility and not recommended.
  • Page 170 J-Links are connected to the PC and shows a selection dialog which allows the user to select the appropriate J-Link to connect to. So even in IDEs which do not have an selection option for the J-Link, it is possible to connect to different J-Links.

  • Page 171: Using The J-Link Dll

    4.7.2.1 Updating the J-Link DLL in the IAR Embedded Workbench for ARM (EWARM) It is recommended to use the J-Link DLL updater to update the J-Link DLL in the IAR Embedded Workbench. The IAR Embedded Workbench IDE is a high-performance integrated development environment with an editor, compiler, linker, debugger.

  • Page 172: Determining The Version Of Jlink Dll

    Process Explorer. It shows you details about the DLLs used by your program, such as manufacturer and version. Process Explorer is - at the time of writing - a free utility which can be downloaded from www.sysinternals.com. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 173: Getting Started With J-Link And Arm Ds-5

    RDDI DLL in DS-5. An backup of the original DLL is made automatically. 4.8.1 Replacing the RDDI DLL manually If J-Link DLL Updater is unable to find a DS-5 installation and does not list it for updating, the RDDI DLL can always be replaced manually. For more information about...
  • Page 174 Click Apply. • Start a new debug session with the newly created debug configuration. • Now the debug session should start and downloaded the application to the tar- get. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 175: Working With J-Link And J-Trace

    Chapter 5 Working with J-Link and J-Trace This chapter describes functionality and how to use J-Link and J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 176: Connecting The Target System

    5.1.2 Verifying target device connection If the USB driver is working properly and your J-Link / J-Trace is connected with the host system, you may connect J-Link / J-Trace to your target hardware. Then start JLink.exe which should now display the normal J-Link / J-Trace related information and in addition to that it should report that it found a JTAG target and the target’s...

  • Page 177: Indicators

    5.2.1 Main indicator For J-Links up to V7, the main indicator is single color (Green). J-Link V8 comes with a bi-color indicator (Green & Red LED), which can show multiple colors: green, red and orange.
  • Page 178 GREEN, constant Emulator has enumerated and is in idle mode. GREEN, switched off for J-Link heart beat. Will be activated after the emulator 10ms once per second has been in idle mode for at least 7 seconds. Emulator has a fatal error. This should not normally hap- GREEN, flashing at 1 Hz pen.

  • Page 179: Input Indicator

    5.2.2 Input indicator Some newer J-Links such as the J-Link Pro/Ultra come with additional input/output indicators. The input indicator is used to give the user some information about the status of the target hardware. 5.2.2.1 Bi-color input indicator Indicator status...

  • Page 180: Jtag Interface

    IAR C-SPY® debugger, ARM’s AXD using RDI, a flash programming application such as SEGGER’s J-Flash, or any other application using J-Link / J-Trace. It is the applica- tion’s responsibility to supply a way to configure the scan chain. Most applications offer a dialog box for this purpose.
  • Page 181 SEGGER J-Flash configuration dialog This dialog box can be found at Options|Project settings. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 182 This dialog can be found under RDI|Configure for example in IAR Embedded Work- bench®. For detailed information check the IAR Embedded Workbench user guide. IAR J-Link configuration dialog box This dialog box can be found under Project|Options. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 183: Determining Values For Scan Chain Configuration

    If only one device is connected to the scan chain, the default configuration can be used. In other cases, J-Link / J-Trace may succeed in automatically recognizing the devices on the scan chain, but whether this is possible depends on the devices present on the scan chain.

  • Page 184: Jtag Speed

    JTAG interface. If you use the adaptive clocking feature, transmission delays, gate delays, and syn- chronization requirements result in a lower maximum clock frequency than with non- adaptive clocking. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 185: Swd Interface

    Table 5.6: J-Link supported SWO input speeds 5.4.2.2 Configuring SWO speeds The max. SWO speed in practice is the max. speed which both, target and J-Link can handle. J-Link can handle the frequencies described in SWO on page 185 whereas the max.
  • Page 186 Example 2 Target CPU running at 10 MHz. Possible SWO output speeds are: 10MHz, 5MHz, 3.33MHz, ... J-Link V7: Supported SWO input speeds are: 6MHz / n, n>= 1: 6MHz, 3MHz, 2MHz, 1.5MHz, ... Permitted combinations are: SWO output SWO input...

  • Page 187: Multi-Core Debugging

    Multi-core debugging J-Link / J-Trace is able to debug multiple cores on one target system connected to the same scan chain. Configuring and using this feature is described in this section. 5.5.1 How multi-core debugging works Multi-core debugging requires multiple debuggers or multiple instances of the same debugger.

  • Page 188: Using Multi-Core Debugging In Detail

    Working with J-Link and J-Trace 5.5.2 Using multi-core debugging in detail Connect your target to J-Link / J-Trace. Start your debugger, for example IAR Embedded Workbench for ARM. Choose Project|Options and configure your scan chain. The picture below shows the configuration for the first CPU core on your target.

  • Page 189: Things You Should Be Aware Of

    JTAG speeds. For example: • Core #1: 2MHz maximum JTAG speed • Core #2: 4MHz maximum JTAG speed • Scan chain: 2MHz maximum JTAG speed J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 190 All cores share the same RESET line. You should be aware that resetting one core through the RESET line means resetting all cores which have their RESET pins con- nected to the RESET line on the target. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 191: Connecting Multiple J-Links / J-Traces To Your Pc

    J-Links connected to the same host at the same time. In order to connect to the correct J-Link, the user has to make sure that the correct J-Link is selected (by SN or IP). In cases where no specific J-Link is selected, following pop up will shop and allow the user to select the proper J-Link: The sketch below shows a host, running two application programs.
  • Page 192 For example, old IAR EWARM versions supports connecting to a J-Link via the USB0-3 method only. As soon as more than one J-Link is connected to the pc, there is no oppertunity to pre-select the J-Link which should be used for a debug session.

  • Page 193: J-Link Control Panel

    J-Link features such as flash download, flash breakpoints and instruction set simulation. The J-Link control panel window can be accessed via the J-Link tray icon in the tray icon list. This icon is available when the debug session is started.
  • Page 194 Section: Flash download In this section, settings for the use of the J-Link FlashDL feature and related set- tings can be configured. When a license for J-Link FlashDL is found, the color indi- cator is green and "License found"...
  • Page 195 Save settings: When this button is pushed, the current settings in the Settings tab will be saved in a configuration file. This file is created by J-Link and will be created for each project and each project configuration (e.g. Debug_RAM, Debug_Flash).
  • Page 196 Note: It is possible for the debugger to bypass the breakpoint functionality of the J-Link software by writing to the debug registers directly. This means for ARM7/ ARM9 cores write accesses to the ICE registers, for Cortex-M3 devices write accesses to the memory mapped flash breakpoint registers and in general simple write accesses for software breakpoints (if the program is located in RAM).
  • Page 197 In this section the name and the value of the CPU registers are shown. 5.7.1.6 Target Power In this section currently just the power consumption of the target hardware is shown. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 198 In this section SWV information are shown. • Status: Shows the encoding and the baudrate of the SWV data received by the target (Manchester/UART, currently J-Link only supports UART encoding). • Bytes in buffer: Shows how many bytes are in the DLL SWV data buffer.

  • Page 199: Reset Strategies

    Some CPUs can actually be halted before executing any instruction, because the start of the CPU is delayed after reset release. If a pause has been specified, J-Link waits for the specified time before trying to halt the CPU. This can be useful if a bootloader which resides in flash or ROM needs to be started after reset.
  • Page 200 No reset is performed. Nothing happens. 5.8.1.5 Type 4: Hardware, halt with WP The hardware RESET pin is used to reset the CPU. After reset release, J-Link continu- ously tries to halt the CPU using a watchpoint. This typically halts the CPU shortly after reset release;...

  • Page 201: Strategies For Cortex-M Devices

    It is recommended that the correct device is selected in the debugger so the debugger can pass the device name to the J-Link DLL which makes it possible for J-Link to detect what is the best reset strategy for the device. Moreover, we recom- mend that the debugger uses reset type 0 to allow J-Link to dynamically select what reset is the best for the connected device.
  • Page 202 Clear VC_CORERESET. This type of reset may fail if: • J-Link has no connection to the debug interface of the CPU because it is in a low power mode. • The debug interface is disabled after reset and needs to be enabled by a device internal bootloader.
  • Page 203 This reset strategy is only guaranteed to work on "modern" J-Links (J-Link V8, J-Link Pro, J-link ULTRA, J-Trace for Cortex-M, J-Link Lite) and if a SWD speed of min. 1 MHz is used. This reset strategy should also work for J-Links with hardware version 6, but it can not be guaranteed that these J-Links are always fast enough in disabling the watchdog.

  • Page 204: Using Dcc For Memory Access

    DCC handler from time to time. This DCC handler typically requires less than 1 µs per call. The DCC handler, as well as the optional DCC abort handler, is part of the J-Link soft- ware package and can be found in the Samples\DCC\IAR directory of the package.

  • Page 205: The J-Link Settings File

    Most IDEs provide a path to a J-Link settings file on a per-project-per-debug-config- uration basis. This file is used by J-Link to store various debug settings that shall sur- vive between debug sessions of a project. It also allows the user to perform some override of various settings.

  • Page 206: J-Link Script Files

    CoreSight components (ETM, ...) that cannot be auto- detected by J-Link due to erroneous ROM tables etc. May also be used to specify the device name in case debugger does not pass it to the DLL.
  • Page 207 Currently this function is only used to configure whether the target which is connected to J-Link has an ETB or not. For more information on how to configure the existence of an ETB, please refer to Global DLL variables on page 213.

  • Page 208: Script File Api Functions

    Prototype __api__ int Report1(const char * sMsg, int v); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 209 Before calling this function, please make sure that the JTAG chain has been config- ured correctly by setting the appropriate global DLL variables. For more information about the known global DLL variables, please refer to Global DLL variables on page 213. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 210 Writes a given number of clocks. Prototype __api__ int JTAG_WriteClocks(int NumClocks); 5.11.2.15JTAG_StoreClocks() Description Stores a given number of clocks in the DLL JTAG buffer. Prototype __api__ int JTAG_StoreClocks(int NumClocks); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 211 Allows the user to manually configure the AP-layout of the device J-Link is connected to. This makes sense on targets on which J-Link can not perform a auto-detection of the APs which are present on the target system. Type can only be a known global J- Link DLL AP constant.
  • Page 212 The JTAG -> SWD switching sequence is output. It is also made sure that the "overrun mode enable" bit in the SW-DP CTRL/STAT reg- ister is cleared, as in SWD mode J-Link always assumes that overrun detection mode is disabled.

  • Page 213: Global Dll Variables

    In the following all global variables and their value ranges are listed and described. Note: All global variables are treated as unsigned 32-bit values and are zero-ini- tialized. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 214 Used in InitTarget() to skip the core auto- detection of J-Link. This variable can only be set to a known global J-Link DLL constant. For a list of all valid values, please refer to Global DLL con- stants on page 217.
  • Page 215 Example JLINK_TRACE_Portwidth = 4; If the connected device has an ETB and you want to use it with J-Link, this variable should be set to 1. Setting this variable in another function as InitEmu() does not have any effect. EMU_ETB_IsPresent...
  • Page 216 CoreSight information. Example CORESIGHT_CoreBaseAddr = 0x80030000; Pre-selects an AP as an AHB-AP that J-Link uses for debug communication (Cortex-M). Setting this variable is necessary for example when debugging multi-core devices where multiple AHB-APs are present (one for each device).

  • Page 217: Global Dll Constants

    Variable Description Overrides the default settings to be used by the DLL when configuring the AHB-AP CSW register. By default, the J-Link DLL will use the following settings for the CSW: Cortex-M0, M0+, M3, M4 [30] == 0 [28] == 0...
  • Page 218 CORESIGHT_AHB_AP • CORESIGHT_APB_AP • CORESIGHT_JTAG_AP • CORESIGHT_CUSTOM_AP DP/AP register indexes • JLINK_CORESIGHT_DP_REG_IDCODE • JLINK_CORESIGHT_DP_REG_ABORT • JLINK_CORESIGHT_DP_REG_CTRL_STAT • JLINK_CORESIGHT_DP_REG_SELECT • JLINK_CORESIGHT_DP_REG_RDBUF • JLINK_CORESIGHT_AP_REG_CTRL • JLINK_CORESIGHT_AP_REG_ADDR • JLINK_CORESIGHT_AP_REG_DATA • JLINK_CORESIGHT_AP_REG_BD0 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 219: Script File Language

    JLINK_TIF_SWD 5.11.5 Script file language The syntax of the J-Link script file language follows the conventions of the C-lan- guage, but it does not support all expresisons and operators which are supported by the C-language. In the following, the supported operators and expressions are listed.

  • Page 220: Script File Writing Example

    5.11.6 Script file writing example In the following, a short example of how a J-Link script file could look like. In this example we assume a JTAG chain with two devices on it (Cortex-A8 4 bits IRLen, cus- tom device 5-bits IRLen).
  • Page 221 IAR EWARM does not provide any native support for J-Link script files so usage of them cannot be configured from within the GUI of the IDE itself. Anyhow, it is possi- ble to use a J-Link script file by making use of the auto-search feature of the DLL: •...
  • Page 222 J-Link settings file, please refer to The J-Link settings file on page 205. 5.11.7.4 In other debugger IDE environments To execute a J-Link script file out of your debugger IDE, simply select the script file to execute in the Settings tab of the J-Link control panel and click the save button (after the debug session has been started).

  • Page 223: Command Strings

    5.12 Command strings The behavior of the J-Link can be customized via command strings passed to the JLinkARM.dll which controls J-Link. Applications such as the J-Link Commander, but also the C-SPY debugger which is part of the IAR Embedded Workbench, allow pass- ing one or more command strings.
  • Page 224 J-Link and target CPU, for a SetSysPowerDownOnIdle specified timeframe. Specifies the verify option to be used. SetVerifyDownload Specifies RAM area to be used by the J-Link DLL. SetWorkRAM Opens control panel. ShowControlPanel Update new firmware automatically. SilentUpdateFW...
  • Page 225 This command is used to select a specific APB-AP to be used when connected to an ARM Cortex-A or Cortex-R device. Usually, it is not necessary to explicitly select an AHB-AP to be used, as J-Link auto-detects the AP automatically. For multi-core sys- tems with multiple APB-APs it might be necessary.
  • Page 226 DisableAutoUpdateFW 5.12.1.6 DisableCortexMXPSRAutoCorrectTBit Usually, the J-Link DLL auto-corrects the T-bit of the XPSR register to 1, for Cortex-M devices. This is because having it set as 0 is an invalid state and would cause several problems during debugging, especially on devices where the erased state of the flash is 0x00 and therefore on empty devices the T-bit in the XPSR would be 0.
  • Page 227 Syntax DisableInfoWinFlashDL 5.12.1.11DisableMOEHandling The J-Link DLL outputs additional information about mode of entry (MOE) in case the target CPU halted / entered debug mode. Disabled by default. Syntax DisableMOEHandling 5.12.1.12DisablePowerSupplyOnClose This command is used to ensure that the power supply for the target will be disabled on close.
  • Page 228 This command is used to invalidate flash ranges in flash cache, that are configured to be excluded from the cache. Per default, all areas that J-Link knows to be Flash memory, are cached. This means that it is assumed that the contents of this area do not change during program execution.
  • Page 229 InvalidateCache 5.12.1.26InvalidateFW This command is used to invalidate the current firmware of the J-Link / J-Trace. Inval- idating the firmware will force a firmware update. Can be used for downdating. For more information please refer to J-Link / J-Trace firmware on page 446.
  • Page 230 Reserved 0x40008000-0x7FCFFFFF Reserved 0x7FD02000-0x7FD02000 Reserved 0x80000000-0xDFFFFFFF Reserved To exclude these areas from being accessed through J-Link the map exclude com- mand should be used as follows: map exclude 0x00080000-0x3FFFFFFF map exclude 0x40008000-0x7FCFFFFF map exclude 0x7FD02000-0x7FD02000 map exclude 0x80000000-0xDFFFFFFF 5.12.1.28map illegal This command marks a specified memory region as an illegal memory area.
  • Page 231 Used with other "map" commands to return to the default values. The map reset command should be called before any other "map" command is called. Syntax map reset Example map reset J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 232 CHAPTER 5 Working with J-Link and J-Trace 5.12.1.33ProjectFile This command is used to specify a file used by the J-Link DLL to save the current configuration. Using this command is recommended if settings need to be saved. This is typically the case if Flash breakpoints are enabled and used.
  • Page 233 // Enables instruction set simulation 5.12.1.39SetBatchMode This command is used to tell the J-Link DLL that it is used in batch-mode / automa- tized mode, so some dialogs etc. will automatically close after a given timeout. Dis- abled by default.
  • Page 234 // Select using fastest method 5.12.1.43SetCPUConnectIDCODE Used to specify an IDCODE that is used by J-Link to authenticate itself when connect- ing to a specific device. Some devices allow the user to lock out a debugger by default, until a specific unlock code is provided that allows further debugging. This function allows to automate this process, if J-Link is used in a production environ- ment.
  • Page 235 0x800, all writes of amounts of data < 2 KB will cause the DLL to perform a read-modify-write operation on incomplete sectors. Default: Writing amounts of < 1 KB (0x400) to flash causes J-Link to perform a read- modify-write on the flash.
  • Page 236 Debugger writes 1280 bytes J-Link will erase + program 1 KB of first sector. J-Link will erase + program 256 bytes of second sector. Previous 768 bytes from sec- ond sector are lost. The default makes sense for flash programming where old contents in remaining space of affected sectors are usually not needed anymore.
  • Page 237 TraceSampleAdjust TD = 1000 5.12.1.54 SetResetType This command selects the reset strategy which shall be used by J-Link, to reset the device. The value which is used for this command is analog to the reset type which shall be selected. For a list of all reset types which are available, please refer to Reset strategies on page 199.
  • Page 238 Syntax SetRestartOnClose = 0 | 1 Example SetRestartOnClose = 1 5.12.1.56 SetRTTAddr In some cases J-Link cannot locate the RTT buffer in known RAM. This command is used to set the exact address manually. Syntax SetRTTAddr <RangeStart> Example SetRTTAddr 0x20000000 5.12.1.57 SetRTTTelnetPort...
  • Page 239 // Select using fastest method 5.12.1.61 SetSysPowerDownOnIdle When using this command, the target CPU is powered-down when no transmission between J-Link and the target CPU was performed for a specific time. When the next command is given, the CPU is powered-up. Note: This command works only for Cortex-M3 devices.
  • Page 240 CHAPTER 5 Working with J-Link and J-Trace Example SetVerifyDownload = 1 // Select programmed sectors, fastest method 5.12.1.63SetWorkRAM This command can be used to configure the RAM area which will be used by J-Link. Syntax SetWorkRAM <StartAddressOfArea>-<EndAddressOfArea> Example SetWorkRAM 0x10000000-0x100FFFFF 5.12.1.64ShowControlPanel Executing this command opens the control panel.

  • Page 241: Using Command Strings

    Example SWOSetConversionMode = 0 5.12.2 Using command strings 5.12.2.1 J-Link Commander The J-Link command strings can be tested with the J-Link Commander. Use the com- mand exec supplemented by one of the command strings. Example exec SupplyPower = 1 exec map reset...
  • Page 242 CHAPTER 5 Working with J-Link and J-Trace 5.12.2.2 SEGGER Ozone J-Link command strings can be used inside SEGGER Ozone. They can be used in dif- ferent ways: • From inside a *.jdebug (script-like) Ozone project, by adding a Exec.Com- mand("<Command>"); call into one of the customizable Ozone actions. For more information about them, please refer to the Ozone manual.

  • Page 243: Switching Off Cpu Clock During Debug

    In this case, the CPU will stop at the first instruction in the ISR (typically at address 0x18). J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 244: Cache Handling

    Because ARM7 cores have a unified cache, there is no need to handle the caches dur- ing debug. 5.14.4 Cache handling of ARM9 cores ARM9 cores with cache require J-Link / J-Trace to handle the caches during debug. If the processor enters debug state with caches enabled, J-Link / J-Trace does the fol- lowing:...

  • Page 245: Virtual Com Port (Vcom)

    J-Link Configurator which auto-detects all J-Links that are connected to the host PC via USB & Ethernet. The J-Link Configurator allows the user to enable and disable the VCOM. For more information about the J-Link Configurator, please refer to J-Link Configurator on page 167.
  • Page 246 CHAPTER 5 Working with J-Link and J-Trace J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 247: Flash Download

    Chapter 6 Flash download This chapter describes how the flash download feature of the DLL can be used in dif- ferent debugger environments. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 248: Introduction

    Moreover, the J-Link DLL also allows programming of CFI-compliant external NOR flash memory. The flash down- load feature of the J-Link DLL does not require an extra license and can be used free of charge.

  • Page 249: Licensing

    Licensing No extra license required. The flash download feature can be used free of charge. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 250: Supported Devices

    CHAPTER 6 Flash download Supported devices J-Link supports download into the internal flash of a large number of microcontrol- lers. You can always find the latest list of supported devices on our website: http://www.segger.com/jlink_supported_devices.html In general, J-Link can be used with any ARM7/9/11, Cortex-M0/M1/M3/M4 and Cor- tex-A5/A8/R4 core even if it does not provide internal flash.

  • Page 251: Setup For Various Debuggers (Internal Flash)

    First, choose the right device in the project settings if not already done. The device settings can be found at Project->Options->General Options->Target. To use the J-Link flash loaders, the IAR flash loader has to be disabled. To disable the IAR flash loader, the checkbox Use flash loader(s) at Project->Options->Debug- ger->Download has to be disabled, as shown below.
  • Page 252 First, choose the device in the project settings if not already done. The device set- tings can be found at Project->Options for Target->Device. To enable the J-Link flash loader J-Link / J-Trace at Project->Options for Tar- get->Utilities has to be selected. It is important that "Update Target before Debug- ging"...
  • Page 253 Then J-Link has to be selected as debugger. To select J-Link as debugger simply choose J-Link J-Trace from the list box which can be found at Project- >Options for Target->Debug. Now setup the Download Options at Project->Options for Target->Debug ->...

  • Page 254: Mentor Sourcery Codebench

    J-Link GDB Server The configuration for the J-Link GDB Server is done by the .gdbinit file. The follow- ing command has to be added to the .gdbinit file to enable the J-Link flash down- load feature: monitor flash device <DeviceName>...

  • Page 255: J-Link Commander

    J-Link GDB Server on page 92. 6.4.5 J-Link Commander J-Link Commander supports downloading bin files into internal flash memory of pop- ular microcontrollers. In the following, it is explained which steps are necessary to prepare J-Link Commander for download into internal flash memory.

  • Page 256: J-Link Rdi

    Flash download 6.4.6 J-Link RDI The configuration for J-Link RDI is done via the J-Link RDI configuration dialog. For more information about the J-Link RDI configuration dialog please refer to UM08004, J-Link RDI User Guide, chapter Configuration dialog. J-Link / J-Trace (UM08001)

  • Page 257: Setup For Various Debuggers (Cfi Flash)

    Initialization of the external memory interface the CFI flash is con- nected to, is user's responsibility and is expected by the J-Link software to be done prior to performing accesses to the specified CFI area. In this section, the setup for different debuggers is explained.

  • Page 258: J-Link Gdb Server

    Flash download 6.5.2 J-Link GDB Server The configuration for the J-Link GDB Server is done by the .gdbinit file. The follow- ing commands have to be added to the .gdbinit file to enable the flash download feature: monitor WorkRAM = <SAddr>-<EAddr>...

  • Page 259: Setup For Various Debuggers (Spifi Flash)

    Setup for various debuggers (SPIFI flash) The J-Link DLL supports programming of SPIFI flash and the J-Link flash download feature can be used therefor by different debuggers, such as IAR Embedded Work- bench, Keil MDK, GDB based IDEs, ... There is nothing special to be done by the user to also enable download into SPIFI flash.

  • Page 260: Qspi Flash Support

    Flash download QSPI flash support The J-Link DLL also supports programming of any (Q)SPI flash connected to a device that is supported by the J-Link DLL, if the device allows memory-mapped access to the flash. Most modern MCUs / CPUs provide a so called "QSPI area" in their mem- ory-map which allows the CPU to read-access a (Q)SPI flash as regular memory (RAM, internal flash etc.).

  • Page 261: Using The Dll Flash Loaders In Custom Applications

    Using the DLL flash loaders in custom applica- tions The J-Link DLL flash loaders make flash behave as RAM from a user perspective, since flash programming is triggered by simply calling the J-Link API functions for memory reading / writing. For more information about how to setup the J-Link API for flash programming please refer to UM08002 J-Link SDK documentation (available for SDK customers only).

  • Page 262: Debugging Applications That Change Flash Contents At Runtime

    In case the debugged application does change the flash contents, it is necessary to disable caching of the effected flash range. This can be done using the J-Link com- mand string ExcludeFlashCacheRange. The SEGGER Wiki provides an articel about this topic that provides further informa- tion, for example how to use J-Link command strings with various IDEs.

  • Page 263: Flash Breakpoints

    Chapter 7 Flash breakpoints This chapter describes how the flash breakpoints feature of the DLL can be used in different debugger environments. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 264: Introduction

    Flash breakpoints Introduction The J-Link DLL supports a feature called flash breakpoints which allows the user to set an unlimited number of breakpoints in flash memory rather than only being able to use the hardware breakpoints of the device. Usually when using hardware break- points only, a maximum of 2 (ARM 7/9/11) to 8 (Cortex-A/R) breakpoints can be set.

  • Page 265: Licensing

    In order to use the flash breakpoints feature a separate license is necessary for each J-Link. For some devices J-Link comes with a device-based license and some J-Link models also come with a full license for flash breakpoints but the normal J-Link comes without any licenses. For more information about licensing itself and which devices have a device-based license, please refer to Licensing on page 55.

  • Page 266: Supported Devices

    CHAPTER 7 Flash breakpoints Supported devices J-Link supports flash breakpoints for a large number of microcontrollers. You can always find the latest list of supported devices on our website: http://www.segger.com/jlink_supported_devices.html In general, J-Link can be used with any ARM7/9/11, Cortex-M0/M1/M3/M4 and Cor- tex-A5/A8/R4 core even if it does not provide internal flash.

  • Page 267: Setup & Compatibility With Various Debuggers

    251. Whether flash breakpoints are available can be verified using the J-Link control panel: 7.4.2 Compatibility with various debuggers Flash breakpoints can be used in all debugger which use the proper J-Link API to set breakpoints. Compatible debuggers/ debug interfaces are: • IAR Embedded Workbench •...

  • Page 268: Flash Breakpoints In Qspi Flash

    This feature is called execute-in-place (XIP). On some cores like Cortex-M where hardware breakpoints are only available in a certain address range, sometimes J-Link flash breakpoints are the only possibility to set breakpoints when debugging code running in QSPI flash.
  • Page 269 Why can flash breakpoints not be used with Rowley Crossworks? Because Rowley Crossworks does not use the proper J-Link API to set breakpoints. Instead of using the breakpoint-API, Crossworks programs the debug hardware directly, leaving J-Link no choice to use its flash breakpoints.
  • Page 270 CHAPTER 7 Flash breakpoints J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 271: Monitor Mode Debugging

    Chapter 8 Monitor Mode Debugging This chapter describes how to use monitor mode debugging support with J-Link. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 272: Introduction

    Halt mode Monitor mode Halt mode is the default debug mode used by J-Link. In this mode the CPU is halted and stops program execution when a breakpoint is hit or the debugger issues a halt request. This means that no parts of the application continue running while the CPU is halted (in debug mode) and peripheral interrupts can only become pending but not taken as this would require execution of the debug interrupt handlers.

  • Page 273: Enable Monitor Debugging

    Enable Monitor Debugging As explained before, by default J-Link uses halt mode debugging. In order to enable monitor mode debugging, the J-Link software needs to be explicitly told to use moni- tor mode debugging. This is done slightly differently from IDE to IDE. In general, the IDE does not notice any difference between halting and monitor debug mode.

  • Page 274: Keil Mdk-Arm (Uvision)

    8.2.3 Keil MDK-ARM (uVision) In Keil MDK-ARM there is no built-in option to pass execs or similar to the J-Link DLL, therefore monitor mode has to be enabled on a per-project basis via the J-Link set- tings file that is created on start of the first dbeug session with a specific project. for more information where to find the J-Link settings file for a Keil MDK-ARM project, please refer to The J-Link settings file on page 205.

  • Page 275: Availability And Limitations Of Monitor Mode

    See Cortex-M4 on page 275. 8.3.2 Cortex-M4 For Cortex-M4, monitor mode debugging is supported. The monitor code provided by SEGGER can easily be linked into the user application. Considerations & Limitations • The user-specific monitor functions must not block the generic monitor for more than 100ms.

  • Page 276: Monitor Code

    A CPU core-specific monitor code is necessary to perform monitor mode debugging with J-Link. This monitor performs the communication with J-Link while the CPU is in debug mode (meaning in the monitor exception). The monitor code needs to be com- piled and linked as a normal part of the application.

  • Page 277: Debugging Interrupts

    Setting breakpoints in interrupt service routines (ISRs) with higher priority than the debug/monitor interrupt will result in malfunction because the CPU cannot take the debug interrupt when hitting the breakpoint. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 278: Having Servicing Interrupts In Debug Mode

    Please keep in mind that there are some limitations for such interrupts: • They cannot be debugged • No breakpoints must be set in any code used by these interrupts J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 279: Forwarding Of Monitor Interrupts

    For more information about how to do this for various IDEs, please refer to Enable Monitor Debugging on page 273. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 280: Target Application Performs Reset (Cortex-M)

    However, there is a small window in which it can happen that a breakpoint is hit before J-Link has restored the monitor bits. If this happens, instead of entering debug mode, a HardFault is triggered. To avoid hanging of the application, a special...

  • Page 281: Low Power Debugging

    Chapter 9 Low Power Debugging This chapter describes how to debug low power modes on a supported target CPU. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 282: Introduction

    "check if CPU is halted/hit a BP". To avoid this, there is a special setting for J-Link that can be activated, to handle such cases in a better way, which is explained in the following.

  • Page 283: Activating Low Power Mode Handling For J-Link

    While usually the J-Link DLL handles communication losses as errors, there is a pos- sibility to enable low power mode handling in the J-Link DLL, which puts the DLL into a less restrictive mode (low-power handling mode) when it comes to such loss-cases.

  • Page 284: Restrictions

    J-Link does it’s best to handle cases where one or more of the above restrictions is not considered but depending on how the IDE reacts to specific operations to fail, error messages may appear or the debug session will be terminated by the IDE.

  • Page 285: Open Flashloader

    Chapter 10 Open Flashloader This chapter describes how to add support for new devices to the J-Link DLL and soft- ware that uses the J-Link DLL using the Open Flashloader concept. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 286: Introduction

    GER and a new release of the J-Link software package being available. The J-Link DLL allows customers to add support for new devices on their own. It is also possible to edit/extend existing devices of the device database by for example adding new flash banks (e.g.

  • Page 287: General Procedure

    By default, the J-Link DLL comes with a build-in device database that defines which device names are known and therefore officially supported by the J-Link DLL and software that uses the J-Link DLL. This list can also be viewed on our website: http://www.segger.com/jlink_supported_devices.html It is possible to add new devices to the currently used DLL by specifying them in an XML file, named JLinkDevices.xml.

  • Page 288: Adding A New Device

    CHAPTER 10 Open Flashloader 10.3 Adding a new device In order to add support for a new device to the J-Link DLL, the following needs to be added to the JLinkDevices.xml: <Database> <Device> <ChipInfo Vendor="..." Name="..." WorkRAMAddr="..." WorkRAMSize="..." Core="..." />...

  • Page 289: Editing/Extending An Existing Device

    10.4 Editing/Extending an Existing Device In order to edit/extend a device that is already in the built-in device database of the J-Link DLL, the following needs to be added to the JLinkDevices.xml: <Database> <Device> <ChipInfo Vendor="..." Name="..." /> <FlashBankInfo Name="..."...

  • Page 290: Xml Tags And Attributes

    Must be closed via </Device>. • May occur multiple times in an XML file 10.5.3 <ChipInfo> Description Specifies basic information about the device to be added, like the core it incorporates etc. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 291 For a list of valid attribute values, please refer to Attrbiute values - Core on page 291. String that specifies the path to a J-Link script file if required for the device. Path can be relative or absolute. If path is relative, it is relative to the location of the JLinkDevices.xml file.
  • Page 292 • JLINK_CORE_RX130 • JLINK_CORE_RX71M • JLINK_CORE_CORTEX_M4 • JLINK_CORE_CORTEX_M7 • JLINK_CORE_CORTEX_M_V8MAINL • JLINK_CORE_CORTEX_A5 • JLINK_CORE_POWER_PC • JLINK_CORE_POWER_PC_N1 • JLINK_CORE_POWER_PC_N2 • JLINK_CORE_MIPS • JLINK_CORE_MIPS_M4K • JLINK_CORE_MIPS_MICROAPTIV • JLINK_CORE_EFM8_UNSPEC • JLINK_CORE_CIP51 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 293: Flashbankinfo

    10.5.4 <FlashBankInfo> Description Specifies a flash bank for the device. This allows to use the J-Link flash download functionality with IDEs, debuggers and other software that uses the J-Link DLL (e.g. J-Link Commander) for this device. The flash bank can then be programmed via the normal flash download functionality of the J-Link DLL.
  • Page 294 Describes that the used algorithm is an Open Flashloader algorithm. CMSIS based algorithms are also supported via the Open Flashloader concept. For addi- tional information, see Add. Info / Considerations / Limitations on page 296. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 295: Example Xml File

    WorkRAMSize="0x4000" JLinkScriptFile="Vendor1/Device1.jlinkscript" Core="JLINK_CORE_CORTEX_M0" /> <FlashBankInfo Name="Int. Flash" BaseAddr="0x70000000" MaxSize="0x10000" Loader="Vendor1/Loader0.FLM" LoaderType="FLASH_ALGO_TYPE_OPEN" /> </Device> <Device> <ChipInfo Vendor="ST" Name="STM32F746NGH6" /> <FlashBankInfo Name="SPIFI Flash" BaseAddr="0x30000000" MaxSize="0x80000" Loader="ST/STM32F7xx_SPIFI.FLM" LoaderType="FLASH_ALGO_TYPE_OPEN" /> </Device> </Database> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 296: Add. Info / Considerations / Limitations

    10.7.1 CMSIS Flash Algorithms Compatibility CMSIS flash algorithms are also supported by the Open Flashloader concept. There- fore, an existing *.FLM file can be simply referenced in a J-Link XML device descrip- tion file. The attribute needs to be set to FLASH_ALGO_TYPE_OPEN.

  • Page 297: J-Flash Spi

    This chapter describes J-Flash SPI and J-Flash SPI CL, which are seperate software (executables) which allow direct programming of SPI flashes, without any additional hardware. Both, J-Flash SPI and J-Flash SPI CL are part of the J-Link software and documentation package which is available free of charge.

  • Page 298: Introduction

    J-Flash SPI requires a PC running one of the supported operating system (see above) with a free USB port dedicated to a J-Link. A network connection is required only if you want to use J-Flash SPI together with J-Link Remote Server.
  • Page 299 11.1.4.2 Target The flash device must be an SPI flash that supports standard SPI protocols. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 300: Licensing

    11.2 Licensing The following chapter provides an overview of J-Flash SPI related licensing options. 11.2.1 Introduction A J-Link PLUS, ULTRA+, PRO or Flasher ARM/PRO is required to use J-Flash SPI. No additional license is required / available. J-Link / J-Trace (UM08001)

  • Page 301: Getting Started

    This chapter presents an introduction to J-Flash SPI. It provides an overview of the included sample projects and describes the menu structure of J-Flash SPI in detail. 11.3.1 Setup For J-Link setup procedure required in order to work with J-Flash SPI, please refer to chapter Setup on page 157 11.3.1.1 What is included?

  • Page 302: Menu Structure

    Target, Options, Window, Help). Any option within these drop-down menus that is followed by a three period ellipsis (...), is an option that requires more information before proceeding. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 303 Description Opens and/or brings the log window to the active win- dow. Opens and/or brings the project window to the active Project window. Table 11.4: View menu elements J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 304 CHAPTER 11 J-Flash SPI Target menu elements Command Description Creates a connection through the J-Link using the config- Connect uration options set in the Project settings... of the Options drop-down menu. Disconnects a current connection that has been made Disconnect through the J-Link.
  • Page 305 Tile Vertical left. Table 11.7: Window menu elements Help menu elements Command Description Shows the J-Link User’s Guide in a PDF viewer such as J-Link User’s Guide Adobe Reader. About... J-Flash SPI and company information. Table 11.8: Help menu elements J-Link / J-Trace (UM08001) ©...

  • Page 306: Settings

    This dialog is used to choose the connection to J-Link. The J-Link can either be connected over USB or via TCP/IP to the host system. Refer to the J-Link manual for more information regarding the operation of J-Link and J-Link TCP/IP Server.
  • Page 307 Init steps and Exit steps which can be used to execute cus- tom command sequences. 11.4.1.2.1 Interface Speed Specifies the SPI communication speed J-Link uses to communicate with the SPI flash. 11.4.1.2.2 Init and Exit steps Can be uesed to add custom command sequences like for example write protection register.
  • Page 308 The checked options will be perforemed when auto programming a target (Target -> Auto, shortcut: F7) . The default behaviour is Compare, Erase sectors if not blank, Program and Verify. Find below a table which describes the commands: J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 309: Global Settings

    If this option is checked, connection to the target will be closed at the end of each operation. 11.4.2.1.2 Automatically unlock sectors If this option is checked, all sectors affected by an erase or program operation will be automatically unlocked if necessary. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 310 11.4.2.2.2 Enable J-Link logfile If this option is checked, you can specify a file name for the J-Link logfile. The J-Link logfile differs from the log window output of J-Flash SPI. It does not log J-Flash SPI operations performed.

  • Page 311: Command Line Interface

    [<SADDR>]. Neither the angel nor the square brackets must be typed on the command line, they are used here only to denote (optional) parameters. Also, note that a parameter must follow immediately after the option, e.g. JFlashSPI.exe -openprjC:\Projects\Default.jflash. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 312 Save the current project in the specified file. -verify Verify target memory. -usb<SN> Overrides connection settings to USB. -ip<xxx.xxx.xxx.xxx> Overrides connection settings to IP. -ip<HostName> Table 11.10: J-Flash SPI command line options J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 313: Batch Processing

    The easiest way is to setup the appropriate project once and then make multiple cop- ies of this project. Now modify the Connection to J-Link setting in each project, in order to let J-Flash SPI connect to the different programmers as shown in the screen-...
  • Page 314 CHAPTER 11 J-Flash SPI @ECHO OFF ECHO Open first project which is configured to connect to the first J-Link. Open data file, start auto processing and exit open JFlashSPI.exe -openprjC:\Projects\Project01.jflash -openC:\Data\data.bin, 0x100000 -auto -exit IF ERRORLEVEL 1 goto ERROR ECHO Open second project which is configured to connect to the second J-Link. Open data file, start auto processing and exit open JFlashSPI.exe -openprjC:\Projects\Project02.jflash -openC:\Data\data.bin,...

  • Page 315: Create A New J-Flash Spi Project

    Select File -> New Project to create a new project with default settings. Open the Project Settings context menu. Select Options -> Project Settings to open the Project settings dialog and select the type of connection to J-Link. Define the SPI communication speed. The default settings work without any problem for most targets, but to achieve the last quantum of performance, man- ual tuning may be necessary.

  • Page 316: Custom Command Sequences

    Step #20 to Step#22: Set Write Enable Step #23 to Step#27: Program security register with values from Var buffer Step #28 to Step#32: Read back security register to verify successful programming J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 317: J-Flash Spi Command Line Version

    J-Flash SPI or by editing the *.jflash project, manually. The exepected for- mat of the custom command sequences in the J-Flash project file is described below. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 318 Below is a small example excerpt from a J-Flash project, which shows a example sequence to erase sector 0 of the SPI flash using the 0xD8 command. Further exam- ples can be found in the installation directory of the J-Link software and documenta- tion package.
  • Page 319 // Wait until sector has been erased ExitStep6_Action = "Delay" ExitStep6_Comment = "Wait until sector has been erased" ExitStep6_Value0 = 0x00000080 ExitStep6_Value1 = 0x00000000 NumExitSteps = 7 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 320: Device Specifics

    When manually changing the SectorErase command in the Options -> Project settings... -> Flash tab, make sure that the SectorSize parameter matches the command being used. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 321: Target Systems

    11.9.1 Which flash devices can be programmed? In general, all kinds of SPI flash can be programmed. Since all flash parameters are configurable, also flashes with non-standard command sets can be programmed. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 322: Performance

    In direct programming mode (J-Link directly connects to the pins of the SPI flash), the programming speed is mainly limited by the SPI communication speed, the USB speed of J-Link (if a Full-Speed or Hi-Speed based J-Link is used) and the maximum programming speed of the flash itself.

  • Page 323: Background Information

    Flash SPI software. 11.11.1 SPI interface connection For direct SPI flash programming, J-Link needs to be wired to the SPI flash in a spe- cific way. For more information about the pinout for the J-Link SPI target interface, please refer to UM08001, J-Link J-Trace User Guide. The minimum pins that need to be connected, are: VTref, GND, SPI-CLK, MOSI, MISO.

  • Page 324: Support

    11.12.1.1Typical problems Target system has no power Meaning: J-Link could not measure the target (flash) reference voltage on pin 1 of its connec- tor. Remedy: The target interface of J-Link works with level shifters to be as flexible as possible.
  • Page 325 CPU register set as ARM7 CPUs. This chapter describes how to use the RDI DLL which comes with the J-Link software and documentation package. The J-Link RDI DLL allows the user to use J-Link with any RDI-compliant debugger and IDE.

  • Page 326: Introduction

    J-Link RDI mainly consists of a DLL designed for ARM cores to be used with any RDI compliant debugger. The J-Link DLL feature flash download and flash breakpoints can also be used with J-Link RDI.

  • Page 327: Licensing

    12.2 Licensing In order to use the J-Link RDI software a separate license is necessary for each J- Link. For some devices J-Link comes with a device-based license and some J-Link models also come with a full license for J-Link RDI. The normal J-Link however, comes without any licenses.

  • Page 328: Setup For Various Debuggers

    CHAPTER 12 12.3 Setup for various debuggers The J-Link RDI software is an ARM Remote Debug Interface (RDI) for J-Link. It makes it possible to use J-Link with any RDI compliant debugger. Basically, J-Link RDI con- sists of a additional DLL ( JLinkRDI.dll ) which builds the interface between the RDI API and the normal J-Link DLL.
  • Page 329 ( JLinkRDI.dll ) and click OK . Now an extra menu, RDI, has been added to the menu bar. Choose RDI | Configure to configure the J-Link. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 344.
  • Page 330 ARM. Since IAR EWARM version 5.11 it is possible to use J-Link RDI for Cortex-M devices because SEGGER and IAR have come to an agree- ment regarding the RDI register assignment for Cortex-M. The following table lists...

  • Page 331: Arm Axd (Arm Developer Suite, Ads)

    12.3.2.2 Configuring to use J-Link RDI Start the ARM debugger and select Options | Configure Target..This opens the Choose Target dialog box: Press the Add Button to add the JLinkRDI.dll . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 332 CHAPTER 12 Now J-Link RDI is available in the Target Environments list. Select J-Link and press OK to connect to the target via J-Link. For more informa- tion about the generic setup of J-Link RDI, please refer to Configuration on page 344.

  • Page 333: Arm Rvds (Realview Developer Suite)

    12.3.3 ARM RVDS (RealView developer suite) 12.3.3.1 Software version J-Link RDI has been tested with ARM RVDS version 2.1 and 3.0. There should be no problems with earlier versions of RVDS (up to version v3.0.1). All screenshots are taken from ARM’s RVDS version 2.1.
  • Page 334 Select File | Connection | Connect to Target . In the Connection Control dialog use the right mouse click on the first item and select Add/Remove/Edit Devices . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 335 OK , Short Name: JLinkRDI Description: J-Link RDI Interface . Back in the RDI Target List Dialog, select JLink-RDI and click Configure . For more information about the generic setup of J-Link RDI, please refer to Configu- ration on page 344. J-Link / J-Trace (UM08001)
  • Page 336 CHAPTER 12 Click the OK button in the configuration dialog. Now close the RDI Target List dialog. Make sure your target hardware is already connected to J-Link. In the Connection control dialog, expand the JLink ARM RDI Interface and select the ARM_0 Processor. Close the Connection Control Window.
  • Page 337 Now the RealView Debugger is connected to J-Link. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 338: Ghs Multi

    CHAPTER 12 10. A project or an image is needed for debugging. After downloading, J-Link is used to debug the target. 12.3.4 GHS MULTI 12.3.4.1 Software version J-Link RDI has been tested with GHS MULTI version 4.07. There should be no prob- lems with other versions of GHS MULTI.
  • Page 339 Arguments field: -config -dll <FullPathToJLinkDLLs> Note that JLinkRDI.dll and JLinkARM.dll must be stored in the same directory. If the standard J-Link installation path or another path that includes spaces has been used, enclose the path in quotation marks. Example: -config -dll "C:\Program Files\SEGGER\JLinkARM_V350g\JLinkRDI.dll"...
  • Page 340 CHAPTER 12 Confirm the choices by clicking the Apply button after the Connect button. The J-Link RDI Configuration dialog will open. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 344. Click the OK button to connect to the target. Build the project and start the debugger.

  • Page 341: Keil Mdk (Μvision Ide)

    12.3.5 KEIL MDK (µVision IDE) 12.3.5.1 Software version J-Link has been tested with KEIL MDK 3.34. There should be no problems with other versions of KEIL µVision. All screenshots are taken from MDK 3.34. 12.3.5.2 Configuring to use J-Link RDI Start KEIL uVision and open the project.
  • Page 342 Select the location of JLinkRDI.dll in Browse for RDI Driver DLL field. and click the Configure RDI Driver button. The J-Link RDI Configuration dialog will be opened.For more information about the generic setup of J-Link RDI, please refer to Configuration on page 344.
  • Page 343 After finishing configuration, the project can be built ( Project | Build Target ) and the debugger can be started ( Debug | Start/Stop debug session ). J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 344: Configuration

    CHAPTER 12 12.4 Configuration This section describes the generic setup of J-Link RDI (same for all debuggers) using the J-Link RDI configuration dialog. 12.4.1 Configuration file JLinkRDI.ini All settings are stored in the file JLinkRDI.ini . This file is located in the same direc- tory as JLinkRDI.dll .
  • Page 345 12.4.4.1 General tab Connection to J-Link This setting allows the user to configure how the DLL should connect to the J-Link. Some J-Link models also come with an Ethernet interface which allows to use an emulator remotely via TCP/IP connection.
  • Page 346 12.4.4.2 Init tab Macro file A macro file can be specified to load custom settings to configure J-Link RDI with advanced commands for special chips or operations. For example, a macro file can be used to initialize a target to use the PLL before the target application is downloaded, in order to speed up the download.
  • Page 347 * Purpose: Setup for Philips LPC2294 chip ********************************************************************** SetJTAGSpeed(1000); Reset(0); Write32(0xE01FC040, 0x00000001); // Map User Flash into Vector area at (0-3f) Write32(0xFFE00000, 0x20003CE3); // Setup CS0 Write32(0xE002C014, 0x0E6001E4); // Setup PINSEL2 Register SetJTAGSpeed(2000); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 348 Automatic JTAG speed • Adaptive clocking For more information about the different speed settings supported by J-Link, please refer to JTAG Speed on page 184. JTAG scan chain with multiple devices The JTAG scan chain allows to specify the instruction register organization of the tar- get system.
  • Page 349 Furthermore it is necessary for some chips to enter the correct CPU clock frequence. Cache flash contents If enabled, the flash content is cached by the J-Link RDI software to avoid reading data twice and to speed up the transfer between debugger and target. Allow flash download This allows the J-Link RDI software to download program into flash.
  • Page 350 An info window can be displayed while flash breakpoints are used showing the cur- rent operation. Depending on your JTAG speed the info window may hardly to be seen. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 351 199. 12.4.4.7 Log tab A log file can be generated for the J-Link DLL and for the J-Link RDI DLL. This log files may be useful for debugging and evaluating. They may help you to solve a prob- lem yourself, but is also needed by customer support help you.
  • Page 352 060:278 (0000) ARM_SetEndian(ARM_ENDIAN_LITTLE) 060:278 (0000) ARM_SetEndian(ARM_ENDIAN_LITTLE) 060:278 (0000) ARM_ResetPullsRESET(OFF) 060:278 (0009) ARM_Reset(): - Writing 0x54 bytes @ 0x00000178 >3E68> 060:287 (0001) ARM_Halt(): **** Warning: Chip has already been halted. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 353: Semihosting

    12.5 Semihosting Semihosting can be used with J-Link RDI. For more information how to enable semi- hosting in J-Link RDI, please refer to Enabling Semihosting in J-Link RDI + AXD on page 464. 12.5.1 Unexpected / unhandled SWIs When an unhandled SWI is detected by J-Link RDI, the message box below is shown.
  • Page 354 CHAPTER 12 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 355 Chapter 13 SEGGER’s Real Time Terminal (RTT) is a technology for interactive user I/O in embed- ded applications. It combines the advantages of SWO and semihosting at very high performance. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 356: Introduction

    SEGGER RTT can be used with any J-Link model and any supported target processor which allows background memory access, which are Cortex-M and RX targets.

  • Page 357: How Rtt Works

    While auto-detection of the RTT control block location works fine for most targets, it is always possible to manually specify either the exact location of the control block or to specify a certain address range J-Link shall search for a control block for in. This is done via the following command strings: •...

  • Page 358: Requirements

    13.2.4 Requirements SEGGER RTT does not need any additional pin or hardware, despite a J-Link con- nected via the standard debug port to the target. It does not require any configura- tion of the target or in the debugging environment and can even be used with varying target speeds.

  • Page 359: Performance

    13.2.5 Performance The performance of SEGGER RTT is significantly higher than any other technology used to output data to a host PC. An average line of text can be output in one micro- second or less. Basically only the time to do a single memcopy().

  • Page 360: Rtt Communication

    Linux and OS X and can be used for simple RTT use cases. 13.3.3 RTT Logger With J-Link RTT Logger, data from Up-Channel 1 can be read and logged to a file. This channel can for example be used to send performance analysis data to the host.

  • Page 361: Implementation

    13.4 Implementation The SEGGER RTT implementation code is written in ANSI C and can be integrated into any embedded application by simply adding the available sources. RTT can be used via a simple and easy to use API. It is even possible to override the standard printf() functions to be used with RTT.
  • Page 362 SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL); Additional information Once a channel is configured only the flags of the channel should be changed. 13.4.1.3 SEGGER_RTT_GetKey() Description Reads one character from SEGGER RTT buffer 0. Host has previously stored data there. Prototype int SEGGER_RTT_GetKey (void); Return value <...
  • Page 363 13.4.1.4 SEGGER_RTT_HasKey() Description Checks if at least one character for reading is available in SEGGER RTT buffer. 0 Prototype int SEGGER_RTT_HasKey (void); Return value No characters are available to be read. At least one character is available in the buffer.
  • Page 364 NumBytes = sizeof(acIn); NumBytes = SEGGER_RTT_Read(0, &acIn[0], NumBytes); if (NumBytes) { AnalyzeInput(acIn); 13.4.1.8 SEGGER_RTT_SetTerminal() Description Set the "virtual" terminal to send following data on channel 0. Prototype void SEGGER_RTT_SetTerminal(char TerminalId); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 365 SEGGER_RTT_TerminalOut does not affect following data which is sent via channel 0. 13.4.1.10SEGGER_RTT_Write() Description Send data to the host on an RTT channel. Prototype int SEGGER_RTT_Write (unsigned BufferIndex, const char* pBuffer, unsigned NumBytes); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 366 With SEGGER_RTT_Write() all kinds of data, not only printable one can be sent. 13.4.1.11SEGGER_RTT_WaitKey() Description Waits until at least one character is avaible in SEGGER RTT buffer 0. Once a character is available, it is read and returned. Prototype int SEGGER_RTT_WaitKey (void);...

  • Page 367: Configuration Defines

    13.4.2.3 Color control sequences RTT_CTRL_RESET Reset the text color and background color. RTT_CTRL_TEXT_* Set the text color to one of the following colors. • BLACK • • GREEN • YELLOW J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 368 • BLUE • MAGENTA • CYAN • WHITE (light grey) • BRIGHT_BLACK (dark grey) • BRIGHT_RED • BRIGHT_GREEN • BRIGHT_YELLOW • BRIGHT_BLUE • BRIGHT_MAGENTA • BRIGHT_CYAN • BRIGHT_WHITE J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 369: Arm Cortex - Background Memory Access

    RTT background memory access, needs to be manually specified. This is done via the following J-Link Command string: CORESIGHT_SetIndexAHBAPToUse on page 225. For more information about how to use J-Link command strings in various environ- ments, please refer to Using command strings on page 241.

  • Page 370: Example Code

    SEGGER_RTT_printf("%sCounter: %s%d\n", RTT_CTRL_TEXT_BRIGHT_WHITE, RTT_CTRL_TEXT_BRIGHT_GREEN, Cnt); if (Cnt > 100) { SEGGER_RTT_TerminalOut(1, RTT_CTRL_TEXT_BRIGHT_RED"Counter overflow!"); Cnt = 0; _Delay(100); Cnt++; } while (1); return 0; /*************************** End of file ****************************/ J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 371 There are two ways: If the debugger (IDE) knows the address of the SEGGER RTT Control Block, it can pass it to J-Link. This is for example done by J-Link Debugger. If another application that is not SEGGER RTT aware is used, then J-Link searches for the ID in the known target RAM during execution of the application in the back- ground.
  • Page 372 CHAPTER 13 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 373: Trace

    Chapter 14 Trace This chapter provides information about tracing in general as well as information about how to use SEGGER J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 374: Introduction

    This enables a fast and efficient way to improve the code or to create a suitable test suite for uncovered blocks. Note: This feature also requires a J-Trace that supports streaming trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 375: What Is Code Profiling

    Note: This feature also requires a J-Trace that supports streaming trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 376: Tracing Via Trace Pins

    (e.g. ARM that provides the ETM as a trace component for their cores). For more information about what tim- ings need to be met for a specific J-Trace model, please refer to J-Link / J-Trace mod- els on page 30.
  • Page 377 TCLK edge a logical 1 is sampled which in this case means that the J-Trace now recieves the correct trace information. TCLK Δt Δt TDx + Δt J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 378: J-Trace Models With Support For Streaming Trace

    CHAPTER 14 Trace 14.2.4 J-Trace models with support for streaming trace For an overview which J-Trace models support streaming trace, please refer to https://wiki.segger.com/Software_and_Hardware_Features_Overview . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 379: Tracing With On-Chip Trace Buffer

    This allows to also do trace on such targets with a regular J-Link, as the on-chip trace buffer can be read out via the regular debug interface J-Link uses to communicate with the target CPU.

  • Page 380: Target Devices With Trace Support

    14.4 Target devices with trace support For an overview for which target devices trace is supported (either via pins or via on- chip trace buffer), please refer https://www.segger.com/ jlink_supported_devices.html#DeviceList . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 381: Streaming Trace

    (would lead to a too big performance drop), a copy of the application contents is cached in the J-Link software at the time, the applica- tion download is performed. This implies that streaming trace is only possible with prior download of the application in the same debug session.
  • Page 382 CHAPTER 14 Trace J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 383: Device Specifics

    Chapter 15 Device specifics This chapter describes for which devices some special handling is necessary to use them with J-Link. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 384: Analog Devices

    CHAPTER 15 Device specifics 15.1 Analog Devices J-Link has been tested with the following MCUs from Analog Devices: • AD7160 • ADuC7020x62 • ADuC7021x32 • ADuC7021x62 • ADuC7022x32 • ADuC7022x62 • ADuC7024x62 • ADuC7025x32 • ADuC7025x62 • ADuC7026x62 • ADuC7027x62 •...
  • Page 385 • Analog ADuC7026x62 • Analog ADuC7027x62 • Analog ADuC7030 • Analog ADuC7031 • Analog ADuC7032 • Analog ADuC7033 • Analog ADuC7128 • Analog ADuC7129 • Analog ADuC7229x126 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 386: Atmel

    CHAPTER 15 Device specifics 15.2 ATMEL J-Link has been tested with the following ATMEL devices: • AT91SAM3A2C • AT91SAM3A4C • AT91SAM3A8C • AT91SAM3N1A • AT91SAM3N1B • AT91SAM3N1C • AT91SAM3N2A • AT91SAM3N2B • AT91SAM3N2C • AT91SAM3N4A • AT91SAM3N4B • AT91SAM3N4C •...

  • Page 387: At91Sam7

    In order to work with an ATMEL AT91SAM7 device, it has to be initialized. The follow- ing paragraph describes the steps of an init sequence. An example for different soft- ware tools, such as J-Link GDB Server, IAR Workbench and RDI, is given. •...
  • Page 388 CHAPTER 15 Device specifics Samples GDB Sample # connect to the J-Link gdb server target remote localhost:2331 monitor flash device = AT91SAM7S256 monitor flash download = 1 monitor flash breakpoints = 1 # Set JTAG speed to 30 kHz monitor endian little...

  • Page 389: At91Sam9

    15.2.2 AT91SAM9 15.2.2.1 JTAG settings We recommend using adaptive clocking. This information is applicable to the following devices: • AT91RM9200 • AT91SAM9260 • AT91SAM9261 • AT91SAM9262 • AT91SAM9263 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 390: Dspgroup

    CHAPTER 15 Device specifics 15.3 DSPGroup J-Link has been tested with the following DSPGroup devices: • DA56KLF Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 391: Ember

    15.4 Ember For more information, please refer to Silicon Labs on page 407. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 392: Energy Micro

    CHAPTER 15 Device specifics 15.5 Energy Micro For more information, please refer to Silicon Labs on page 407. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 393: Freescale

    If your device has been locked by setting the MCU security status to "secure", and mass erase via debug interface is not disabled, J-Link is able to unlock your Kinetis K40/K60 device. The device can be unlocked by using the "unlock" command in J- Link Commander.
  • Page 394 On later silicons, this has been corrected. This bug applies to all devices with mask 0M33Z from the 100MHz series. The J-Link software and documentation package comes with a sample project for the Kinetis K40 and K60 devices which is pre-configured for the TWR-40 and TWR-60 eval boards and ETM / ETB Trace.
  • Page 395 FCCOB5 = 0x00; // FlexNVM partition code: 256 KB data flash FSTAT = 0x80; // Start command execution while((FSTAT & 0x80) == 0); // Wait until flash controller has finished J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 396: Fujitsu

    CHAPTER 15 Device specifics 15.7 Fujitsu J-Link has been tested with the following Fujitsu devices: • MB9AF102N • MB9AF102R • MB9AF104N • MB9AF104R • MB9BF104N • MB9BF104R • MB9BF105N • MB9BF105R • MB9BF106N • MB9BF106R • MB9BF304N • MB9BF304R •...

  • Page 397: Itron

    15.8 Itron J-Link has been tested with the following Itron devices: • TRIFECTA Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 398: Infineon

    CHAPTER 15 Device specifics 15.9 Infineon J-Link has been tested with the following Infineon devices: • UMF1110 • UMF1120 • UMF5110 • UMF5120 • XMC1100-T016F00xx • XMC1100-T038F00xx • XMC1100-T038F0xxx • XMC1201-T028F0xxx • XMC1201-T038F0xxx • XMC1202-T016X00xx • XMC1202-T028X00xx • XMC1202-T038X00xx •...

  • Page 399: Luminary Micro

    15.10 Luminary Micro J-Link has been tested with the following Luminary Micro devices: • LM3S101 • LM3S102 • LM3S301 • LM3S310 • LM3S315 • LM3S316 • LM3S317 • LM3S328 • LM3S601 • LM3S610 • LM3S611 • LM3S612 • LM3S613 •...

  • Page 400: Unlocking Lm3Sxxx Devices

    If your device has been "locked" accidentially (e.g. by bad application code in flash which mis-configures the PLL) and J-Link can not identify it anymore, there is a spe- cial unlock sequence which erases the flash memory of the device, even if it cannot be identified.
  • Page 401 15.11 NXP J-Link has been tested with the following NXP devices: • LPC1111 • LPC1113 • LPC1311 • LPC1313 • LPC1342 • LPC1343 • LPC1751 • LPC1751 • LPC1752 • LPC1754 • LPC1756 • LPC1758 • LPC1764 • LPC1765 •...

  • Page 402: Lpc Arm7-Based Devices

    Indirect reading solves the fast GPIO problem, because only direct reg- ister access corrupts the register contents. Define a 256 byte aligned area in RAM of the LPC target device with the J-Link com- mand map ram and define afterwards the memory area which should be read indirect with the command map indirectread to use the indirectly reading feature of J-Link.

  • Page 403: Reset (Cortex-M3 Based Devices)

    All devices of the LPC43xx are dual core devices (One Cortex-M4 core and one Cor- tex-M0 core). For these devices, a J-Link script file is needed (exact file depends on if the Cortex-M4 or the Cortex-M0 shall be debugged) in order to guarantee proper functionality.
  • Page 404 CHAPTER 15 Device specifics 15.12 OKI J-Link has been tested with the following OKI devices: • ML67Q4002 • ML67Q4003 • ML67Q4050 • ML67Q4051 • ML67Q4060 • ML67Q4061 Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 405: Renesas

    15.13 Renesas J-Link has been tested with the following Renesas devices: • R5F56104 • R5F56106 • R5F56107 • R5F56108 • R5F56216 • R5F56217 • R5F56218 • R5F562N7 • R5F562N8 • R5F562T6 • R5F562T7 • R5F562TA Currently, there are no specifics for these devices.

  • Page 406: Samsung

    CHAPTER 15 Device specifics 15.14 Samsung J-Link has been tested with the following Samsung devices: • S3FN60D 15.14.1 S3FN60D On the S3FN60D the watchdog may be running after reset (depends on the content of the smart option bytes at addr. 0xC0). The watchdog keeps counting even if the CPU is in debug mode (e.g.

  • Page 407: Silicon Labs

    The SWO related units (ITM, TPIU, ...) are chip-internally wired to a fixed 14 MHz clock (AUXHFRCO). This will cause the auto-detection of J-Link to not work by default for these devices, if the CPU is running at a different speed than AUXHFRCO. All utilities that use SWO...

  • Page 408: St Microelectronics

    CHAPTER 15 Device specifics 15.16 ST Microelectronics J-Link has been tested with the following ST Microelectronics devices: • STR710FZ1 • STR710FZ2 • STR711FR0 • STR711FR1 • STR711FR2 • STR712FR0 • STR712FR1 • STR712FR2 • STR715FR0 • STR730FZ1 • STR730FZ2 •...

  • Page 409: Str91X

    STR91x Commander. 15.16.1.3Switching the boot bank The bootbank of the STR91x devices can be switched by using the J-Link STR9 Com- mander which is part of the J-Link software and documentation package. For more information about the J-Link STR9 Commander, please refer to J-Link STR91x Com- mander (Command line tool) on page 151.
  • Page 410 J-Link STM32 Commander (command line utility) For more information about J-Flash, please refer to UM08003, J-Flash User Guide . For more information about the J-Link STM32 Commander, please refer to J-Link STM32 Unlock (Command line tool) on page 152. Note: Unsecuring a secured device will cause a mass-erase of the internal flash memory.

  • Page 411: Stm32F2Xxx

    SEGGER offers a free command line tool which reprograms the option bytes in order to disable the hardware watchdog. For more information about the STM32 commander, please refer to J-Link STM32 Unlock (Command line tool) on page 152. 15.16.2.5Debugging with software watchdog enabled...

  • Page 412: Stm32F4Xxx

    CHAPTER 15 Device specifics 15.16.4 STM32F4xxx These devices are Cortex-M4 based. All devices of this family are supported by J-Link. 15.16.4.1ETM init The following sequence can be used to prepare STM32F4xxx devices for 4-bit ETM tracing: int v; // Enable GPIOE clock *((volatile int *)(0x40023830)) = 0x00000010;...

  • Page 413: Texas Instruments

    Link GDBServer this needs to be done manually. 15.17.1.1Selecting the device in the IDE When using J-Link in an IDE, there is usually a way to directly select the device in the IDE, since it usually also needs this information for peripheral register view etc. The selected device is then usually automatically passed to the J-Link DLL.

  • Page 414: Am35Xx / Am37Xx

    Needs a J-Link script file to guarantee proper functionality. J-Link script file can be found at $JLINK_INST_DIR$\Samples\JLink\Scripts. For more information about how to use J-Link script files, please refer to Executing J- Link script files on page 220. 15.17.5 TMS470M Needs a J-Link script file to guarantee proper functionality.

  • Page 415: Omap3530

    Needs a J-Link script file to guarantee proper functionality. J-Link script file can be found at $JLINK_INST_DIR$\Samples\JLink\Scripts For more information about how to use J-Link script files, please refer to Executing J- Link script files on page 220. 15.17.7 OMAP3550 Needs a J-Link script file to guarantee proper functionality.

  • Page 416: Toshiba

    CHAPTER 15 Device specifics 15.18 Toshiba J-Link has been tested with the following Toshiba devices: • TMPM321F10FG • TMPM322F10FG • TMPM323F10FG • TMPM324F10FG • TMPM330FDFG • TMPM330FWFG • TMPM330FYFG • TMPM332FWUG • TMPM333FDFG • TMPM333FWFG • TMPM333FYFG • TMPM341FDXBG •...

  • Page 417: Target Interfaces And Adapters

    Chapter 16 Target interfaces and adapters This chapter gives an overview about J-Link / J-Trace specific hardware details, such as the pinouts and available adapters. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 418: Pin J-Link Connector

    Not con- This pin is not connected in J-Link. nected JTAG Reset. Output from J-Link to the Reset signal of the target JTAG port. Typically connected to nTRST of the target nTRST Output CPU.
  • Page 419 420. Table 16.1: J-Link / J-Trace pinout Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. 16.1.1.1 Target board design We strongly advise following the recommendations given by the chip manufacturer.
  • Page 420 Pin 19 of the connector can be used to supply power to the target hardware. Supply voltage is 5V, max. current is 300mA. The output current is monitored and protected against overload and short-circuit. Power can be controlled via the J-Link com- mander. The following commands are available to control power:...

  • Page 421: Pinout For Swd

    422. Table 16.3: J-Link / J-Trace SWD pinout Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. J-Link / J-Trace (UM08001)
  • Page 422 Pin 19 of the connector can be used to supply power to the target hardware. Supply voltage is 5V, max. current is 300mA. The output current is monitored and protected against overload and short-circuit. Power can be controlled via the J-Link commander. The following commands are available to control power: Command...

  • Page 423: Pinout For Swd + Virtual Com Port (Vcom)

    422. Table 16.5: J-Link / J-Trace SWD pinout Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. J-Link / J-Trace (UM08001)

  • Page 424: Pinout For Spi

    Target power supply on page 420. Table 16.6: J-Link / J-Trace pinout Pins 4, 6, 8, 10, 12 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. J-Link / J-Trace (UM08001)

  • Page 425: Pin Mictor Jtag And Trace Connector

    Target board Target board Target board Target board Target board Trace JTAG Trace JTAG Trace JTAG connector connector connector connector connector connector Target board Target board Target board J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 426: Pinout

    Trace signal. For more information, please refer to Trace signal 10 Assignment of trace information pins between ETM archi- tecture versions on page 428. nTRST Active-low JTAG reset. Table 16.7: JTAG+Trace connector pinout J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 427 Trace signal 16 Trace signal 4 Trace signal 15 Trace signal 3 Trace signal 14 Trace signal 2 Trace signal 13 Trace signal 1 Table 16.7: JTAG+Trace connector pinout J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 428: Assignment Of Trace Information Pins Between Etm Architecture Versions

    Max. Explanation Tperiod 1000ns Clock period Fmax 1MHz 200MHz Maximum trace frequency 2.5ns High pulse width 2.5ns Low pulse width 2.5ns Data setup high Table 16.9: Clock frequency J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 429 J-Trace supports half-rate clocking mode. Data is output on each edge of Note: the TRACECLK signal and TRACECLK (max) <= 100MHz. For half-rate clocking, the setup and hold times at the JTAG+Trace connector must be observed. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 430: Pin Jtag/Swd And Trace Connector

    Typically connected to TDI of the target CPU. For CPUs Output which do not provide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD. Not connected inside J-Link. Leave open on target hard- ware.

  • Page 431: Target Power Supply

    Pins 11 and 13 of the connector can be used to supply power to the target hardware. Supply voltage is 5V, max. current is 300mA. The output current is monitored and protected against overload and short-circuit. Power can be controlled via the J-Link commander. The following commands are available to control power: Command...

  • Page 432: Pin Jtag/Swd Connector

    Typically connected to TDI of the target CPU. For CPUs Output which do not provide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD. By default, TRST is not connected, but the Cortex-M...

  • Page 433: Reference Voltage (Vtref)

    16.5 Reference voltage (VTref) VTref is the target reference voltage. It is used by the J-Link to check if the target has power, to create the logic-level reference for the input comparators and to con- trol the output logic levels to the target. It is normally fed from Vdd of the target board and must not have a series resistor.

  • Page 434: Adapters

    CHAPTER 16 Target interfaces and adapters 16.6 Adapters There are various adapters available for J-Link as for example the JTAG isolator, the J-Link RX adapter or the J-Link Cortex-M adapter. For more information about the different adapters, please refer to http://www.segger.com/jlink-adapters.html.

  • Page 435: Background Information

    ARM9 architecture is based on Reduced Instruction Set Computer (RISC) principles. The instruction set and the related decode mechanism are greatly simplified com- pared with microprogrammed Complex Instruction Set Computer (CISC). J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 436: Jtag

    The instruction register holds the current instruction and its content is used by the TAP controller to decide which test to perform or which data register to access. It consist of at least two shift-register cells. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 437: The Tap Controller

    Data may be loaded in parallel to the selected test data registers. Shift-DR The test data register connected between TDI and TDO shifts data one stage towards the serial output with each clock. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 438 Once latched, this new instruction becomes the cur- rent one. The parallel latch prevents changes at the parallel output of the instruction register from occurring during the shifting process. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 439: Embedded Trace Macrocell (Etm)

    In the following a sample integration of J-Trace and the trace functionality on the debugger side is shown. The sample is based on IAR’s Embedded Workbench for ARM integration of J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 440 CHAPTER 17 Background information 17.2.3.1 Code coverage - Disassembly tracing J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 441 17.2.3.2 Code coverage - Source code tracing J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 442 CHAPTER 17 Background information J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 443: Embedded Trace Buffer (Etb)

    No additional special trace port is required, so that the ETB can be read via J-Link. The trace functionality via J-Link is limited by the size of the ETB. While capturing runs, the trace information in the buffer will be overwritten every time the buffer size has been reached.

  • Page 444: Flash Programming

    RDI (Remote debug interface) is a standard for "debug transfer agents" such as J- Link. It allows using J-Link from any RDI compliant debugger. RDI by itself does not include download to flash. To debug in flash, you need to somehow program your application program (debuggee) into the flash.
  • Page 445 Implement your own flash loader using the functionality of the JLinkARM.dll as described above. This can be a time consuming process and requires in-depth knowl- edge of the flash programming algorithm used as well as of the target system. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 446: J-Link / J-Trace Firmware

    Every time you connect to J-Link / J-Trace, JLinkARM.dll checks if its embedded firm- ware is newer than the one used the J-Link / J-Trace. The DLL will then update the firmware automatically. This process takes less than 3 seconds and does not require a reboot.
  • Page 447 In the screenshot: • "Updating firmware" identifies the new firmware. • "Replacing firmware" identifies the old firmware which has been replaced. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 448 CHAPTER 17 Background information J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 449: Designing The Target Board For Trace

    Chapter 18 Designing the target board for trace This chapter describes the hardware requirements which have to be met by the tar- get board. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 450: Overview Of High-Speed Board Design

    The decision is related to track length between the ASIC and the JTAG+Trace connector, see Terminating the trace signal on page 451 for further ref- erence. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 451: Terminating The Trace Signal

    Care must be taken not to connect devices in this way, unless the distor- tion does not affect device operation. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 452: Signal Requirements

    Fmax 200MHz Ts setup time (min.) 2.0ns Th hold time (min.) 1.0ns TRACECLK high pulse width (min.) 1.5ns TRACECLK high pulse width (min.) 1.5ns Table 18.1: Signal requirements J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 453: Semihosting

    Chapter 19 Semihosting J-Link supports semihosting for ARM targets. This chapter explains what semihosting is, what it can be used for and how to enable semihosting in different environments. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 454: Introduction

    GDB. 19.1.2 Disadvantages • Target CPU is halted on each semihosting command, debugger evaluates the semihosting command and restarts the CPU. This affects real-time behavior of the system. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 455: Debugger Support

    • J-Link Debugger • J-Link GDBServer + GDB • SEGGER Embedded Studio • J-Link RDI (and therefor most RDI compliant debuggers) • IAR Embedded Workbench for ARM • Keil MDK-ARM • ARM AXD J-Link / J-Trace (UM08001)

  • Page 456: Implementation

    19.3.3 J-Link GDBServer optimized version When using J-Link GDBServer with a GDB-based environment, there is a third imple- mentation for semihosting available which is a hybrid of the other implementations, combining the advantages of both. With this implementation, an SVC instruction with the usual SVC reason is used to issue a semihosting call but the debugger does not set a breakpoint or vector catch on the start of the SVC exception handler.
  • Page 457 One hardware breakpoint is not available for debugging / stepping as it is perma- nently used while semihosting is enabled. Only works with J-Link GDBServer as other debuggers do not support this specialized version. 19.3.3.1 SVC exception handler sample code...

  • Page 458: Communication Protocol

    0. Return value Operation result is written to register R0 by the debugger. != 0 O.K., handle of the file (needed for SYS_CLOSE etc.) == -1 Error J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 459: Command Sys_Close (0X02)

    Word 0 Handle of the file to be written. Word 1 Pointer to the data on the target, to be written. Word 2 Number of bytes to write J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 460: Command Sys_Read (0X06)

    Operation result is written to register R0 by the debugger. == 1 O.K., given handle is an interactive device. == 0 O.K., given handle is not an interactive device. Else Error J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 461: Command Sys_Seek (0X0A)

    Return value Operation result is written to register R0 by the debugger. == 0 O.K. != 0 Error. 19.4.13 Command SYS_RENAME (0x0F) Renames a file on the host system. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 462: Command Sys_Get_Cmdline (0X15)

    Register R1 is one of the following values: Exit code Meaning 0x20026 Application exited normally. 0x20023 Application exited with error. Table 19.2: SYS_EXIT exit codes Return value None. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 463: Enabling Semihosting In J-Link Gdbserver

    19.5 Enabling semihosting in J-Link GDBServer By default, semihosting is disabled in J-Link GDBServer. Depending on the mecha- nism to be used, different setups are necessary 19.5.1 SVC variant The following commands need to be added to the gdbinit file that is executed at the...

  • Page 464: Enabling Semihosting In J-Link Rdi + Axd

    The S bit in $vector_catch has no effect unless semihosting is disabled. $semihosting_vector This variable controls the location of the breakpoint set by J-Link RDI to detect a semihosted SWI. It is set to the SWI entry in the exception vector table () by default.

  • Page 465: Support And Faqs

    Support and FAQs This chapter contains troubleshooting tips as well as solutions for common problems which might occur when using J-Link / J-Trace. There are several steps you can take before contacting support. Performing these steps can solve many problems and often eliminates the need for assistance.

  • Page 466: Measuring Download Speed

    USB 2.0 port • USB 2.0 hub • J-Link • Target with ARM7 running at 50MHz Below is a screenshot of JLink.exe after the measurement has been performed. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 467: Troubleshooting

    12. Start JLink.exe . 13. If JLink.exe displays the J-Link / J-Trace serial number and the target proces- sor’s core ID, the J-Link / J-Trace is working properly and cannot be the cause of your problem. 14. If the problem persists and you own an original product (not an OEM version), see section Contacting support on page 469.
  • Page 468 CHAPTER 20 Support and FAQs J-Link/J-Trace does not get any connection to the target Most likely reasons: a.) The JTAG cable is defective. b.) The target hardware is defective. Remedy: Follow the steps described in General procedure on page 467.

  • Page 469: Contacting Support

    General procedure on page 467. You may also try your J-Link / J-Trace with another PC and if possible with another target system to see if it works there. If the device functions correctly, the USB setup on the original machine or your target hardware is the source of the problem, not J-Link / J-Trace.

  • Page 470: Frequently Asked Questions

    Can J-Link / J-Trace read back the status of the JTAG pins? Yes, the status of all pins can be read. This includes the outputs of J-Link / J-Trace as well as the supply voltage, which can be useful to detect hardware problems on the target system.

  • Page 471: Glossary

    Chapter 21 Glossary This chapter describes important terms used throughout this manual. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 472 Glossary Adaptive clocking A technique in which a clock signal is sent out by J-Link / J-Trace. J-Link / J-Trace waits for the returned clock before generating the next clock pulse. The technique allows the J-Link / J-Trace interface unit to adapt to differing signal drive capabilities and differing cable lengths.
  • Page 473 Open collector A signal that may be actively driven LOW by one or more drivers, and is otherwise passively pulled HIGH. Also known as a "wired AND" signal. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 474 The electronic clock signal which times data on the TAP data lines TMS, TDI, and TDO. The electronic signal input to a TAP controller from the data source (upstream). Usu- ally, this is seen when connecting the J-Link / J-Trace Interface Unit to the first TAP controller. J-Link / J-Trace (UM08001)
  • Page 475 The electronic signal output from a TAP controller to the data sink (downstream). Usually, this is seen connecting the last TAP controller to the J-Link / J-Trace Inter- face Unit. Test Access Port (TAP) The port used to access a device's TAP Controller. Comprises TCK, TMS, TDI, TDO, and nTRST (optional).
  • Page 476 CHAPTER 21 Glossary J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

  • Page 477: Literature And References

    Chapter 22 Literature and references This chapter lists documents, which we think may be useful to gain deeper under- standing of technical details. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 478 [RVI] Trace User Guide, ARM DUI ments on the target side. 0155C It is publicly available from ARM ( www.arm.com ). Table 22.1: Literature and References J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 479 Program Status Register (PSR) ....474 In-Circuit Emulator ......473 Instruction Register ......473 IR ............ 473 RDI Support ........150 Remapping ........474 Remote Debug Interface (RDI) .....474 J-Flash ARM ........133 RESET ..........473 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
  • Page 480 TDI .......... 418, 474 TDO ......... 418, 475 Test Access Port (TAP) ......475 Transistor-transistor logic (TTL) ... 475 USB ..........306 Watchpoint ........475 Word ..........475 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...

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