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Segger J-Link User Manual

Segger J-Link User Manual

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J-Link / J-Trace

User Guide

Document: UM08001

Software Version: 6.16e

Revision: 0

Date: June 27, 2017

A product of SEGGER Microcontroller GmbH & Co. KG

www.segger.com

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Summary of Contents for Segger J-Link

Page 1 J-Link / J-Trace User Guide Document: UM08001 Software Version: 6.16e Revision: 0 Date: June 27, 2017 A product of SEGGER Microcontroller GmbH & Co. KG www.segger.com...
Page 2 Please make sure your manual is the latest edition. While the information herein is assumed to be accurate, SEGGER Microcontroller GmbH & Co. KG (SEGGER) assumes no responsibility for any errors or omissions. SEGGER makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you.
Page 3 Chapter “Adding Support for New Devices” added. 6.00 160519 Chapter “Related Software” 5.12f 160503 * Section “J-Link RTT Viewer” updated and moved from section “RTT”. Chapter “Working with J-Link and J-Trace” 5.12d 160427 * Section “J-Link script files” updated. Chapter “Working with J-Link and J-Trace”...
Page 4 151204 Chapter “Semihosting” added. Chapter “Related Software” 5.10 151127 * Section “J-Scope” removed. Chapter “Working with J-Link and J-Trace” * Section “The J-Link settings file” added. 5.02m 151125 Chapter “Low Power Debugging” added. Various Chapters 5.02l 151123 * Some typos corrected.
Page 5 * Section “J-Link STM32 Unlock”      Added command line options Chapter “Target interfaces and Adapters” 4.99a 150429 Chapter “20-pin J-Link connector”, section “Pinout for SPI” added. Chapter “Related Software” 4.98d 150427 * Section “Configure SWO output after device reset” updated.
Page 6 Chapter ”Related Software“ * Section ”J-Link Commander“ 4.56a 121106      Renamed ”Commander script files“ to ”Commander files“ and      ”script mode“ to ”batch mode“. Renamed ”J-Link TCP/IP Server“ to ”J-Link Remote Server“ 4.56 121022 Chapter ”Related Software“ 4.54 121009 * Section ”TCP/IP Server“, subsection ”Tunneling Mode“ added.
Page 7 * Section ”Reset strategies“ updated. Chapter ”Target interfaces and adapters“ * Section ”9-pin JTAG/SWD connector“ added. Chapter ”J-Link and J-Trace related software“ * Section ”J-Link software and documentation package in detail“ updated. 4.23d 110202 Chapter ”Introduction“ * Section ”Built-in intelligence for supported CPU-cores“ added.
Page 8 * Section” Specifications“ updated * Section ”Hardware versions“ updated 0.00 090828 * Section ”Common features of the J-Link product family“ updated Chapter ”Target interfaces and adapters“ * Section ”5 Volt adapter“ updated Chapter ”Introduction“ * Section ”J-Link / J-Trace models“ updated.
Page 9 Chapter ”Background information“ * Section ”Embedded Trace Macrocell (ETM)“ updated. 0.00 090327 Chapter ”J-Link and J-Trace related software“ * Section ”Dedicated flash programming utilities for J-Link“ updated. Several changes in the manual structure. 0.00 090320 Chapter ”Working with J-Link“ 0.00 090313 * Section ”Indicators“...
Page 10 080215      Section ”J-Link software and documentation package in detail“ updated. Chapter ”J-Link and J-Trace related software“      Section ”J-Link TCP/IP Server (Remote J-Link / J-Trace use)“ updated. Chapter ”Working with J-Link and J-Trace“      Section ”Command strings“ updated. Chapter ”Flash download and flash breakpoints“...
Page 11      ”Differences between different versions“ supplemented. Chapter ”J-Link / J-Trace related software“: 0.00 070307      ”J-Link GDB Server“ licensing updated. Chapter ”J-Link / J-Trace related software“ updated and reorganized. Chapter ”Hardware“ 0.00 070226      ”List of OEM products“ updated Chapter ”Device specifics“ added 0.00...
Page 12 0.00 060117 Screenshots updated. Chapter Working with J-Link: Sketch added. 0.00 051208 Chapter Working with J-Link: ”Connecting multiple J-Links to your PC“ added. 0.00 051118 Chapter Working with J-Link: ”Multi core debugging“ added. Chapter Background information: ”J-Link firmware“ added. Chapter Setup: ”JTAG Speed“ added.
Page 13: About This Document
Comments in program examples. Sample comment Reference to chapters, sections, tables and figures or other doc- Reference uments. GUIElement Buttons, dialog boxes, menu names, menu commands. Emphasis Very important sections. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 14 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 15: Table Of Contents
Table of contents Introduction ........................22 Requirements ....................23 Supported OS ....................24 Common features of the J-Link product family ..........25 Supported CPU cores ..................26 Built-in intelligence for supported CPU-cores ............27 1.5.1 Intelligence in the J-Link firmware ............27 1.5.2 Intelligence on the PC-side (DLL) ............
Page 16 J-Link STM32 Unlock (Command line tool) ........115 3.13 J-Link Software Developer Kit (SDK) ............118 Setup ......................... 119 Installing the J-Link software and documentation pack ........120 4.1.1 Setup procedure ................120 Setting up the USB interface ............... 121 4.2.1 Verifying correct driver installation .............121...
Page 17 Debugging applications that change flash contents at runtime ......214 Flash breakpoints ......................215 Introduction ....................216 Licensing ....................217 7.2.1 Free for evaluation and non-commercial use ........217 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 18 Having servicing interrupts in debug mode ............ 228 Forwarding of Monitor Interrupts ..............229 Target application performs reset (Cortex-M) ..........230 Low Power Debugging ....................231 Introduction ....................232 Activating low power mode handling for J-Link ..........233 Restrictions ....................234 Open Flashloader ....................235 10.1 Introduction ..................... 236 10.2...
Page 19 13.4.1 API functions ................302 13.4.2 Configuration defines ..............308 13.5 ARM Cortex - Background memory access ........... 310 13.6 Example code ..................311 13.7 FAQ ......................312 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 20 J-Trace integration example - IAR Embedded Workbench for ARM ..337 16.3 Embedded Trace Buffer (ETB) ..............341 16.4 Flash programming ................... 342 16.4.1 How does flash programming via J-Link / J-Trace work? ...... 342 16.4.2 Data download to RAM ..............342 16.4.3 Data download via DCC ..............342 16.4.4 Available options for flash programming ...........
Page 21 18.5.2 Breakpoint variant ................. 362 18.5.3 J-Link GDBServer optimized variant ..........362 18.6 Enabling Semihosting in J-Link RDI + AXD ..........363 18.6.1 Using SWIs in your application ............363 Support and FAQs ....................364 19.1 Measuring download speed ................ 365 19.2...
Page 22: Introduction
This is the user documentation for owners of SEGGER debug probes, J-Link and J-Trace. This manual documents the software which with the J-Link Software and Documentation Package as well as advanced features of J-Link and J-Trace, like Real Time Transfer (RTT), or Trace.
Page 23: Requirements
Requirements Requirements Host System To use J-Link or J-Trace you need a host system running Windows 2000 or later. For a list of all operating systems which are supported by J-Link, please refer to Supported OS on page 24. Target System A target system with a supported CPU is required.
Page 24: Supported Os
CHAPTER 1 Supported OS Supported OS J-Link/J-Trace can be used on the following operating systems: • Microsoft Windows 2000 • Microsoft Windows XP • Microsoft Windows XP x64 • Microsoft Windows 2003 • Microsoft Windows 2003 x64 • Microsoft Windows Vista •...
Page 25: Common Features Of The J-Link Product Family
Memory viewer (J-Mem) included • Remote server included, which allows using J-Trace via TCP/IP networks • RDI interface available, which allows using J-Link with RDI compliant software • Flash programming software (J-Flash) available • Flash DLL available, which allows using flash functionality in custom applications •...
Page 26: Supported Cpu Cores
CHAPTER 1 Supported CPU cores Supported CPU cores J-Link / J-Trace supports any common ARM Cortex core, ARM legacy core, Microchip PIC32 core and Renesas RX core. For a detailed list, please refer to: SEGGER website: Supported Cores If you experience problems with a particular core, do not hesitate to contact SEGGER.
Page 27: Built-In Intelligence For Supported Cpu-Cores
Link firmware. This means, all target sequences (JTAG/SWD/…) are generated on the PC- side and the J-Link simply sends out these sequences and sends the result back to the DLL. Using this way of implementation also allows old J-Links to be used with new CPU cores as long as a DLL-Version is used which has intelligence for the CPU.
Page 28: Firmware Intelligence Per Model
1.5.3 Firmware intelligence per model There are different models of J-Link / J-Trace which have built-in intelligence for different CPU-cores. Please refer to J-Link / J-Trace hardware revisions for further information. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 29: Where To Find Further Information
CHAPTER 1 Where to find further information Where to find further information The following items are not the scope of the J-Link / J-Trace User Guide (UM08001) and therefore documented elsewhere in the respective place described/listed below. 1.6.1 SEGGER debug probes 1.6.1.1...
Page 30: Licensing
Chapter 2 Licensing This chapter describes the different license types of J-Link related software and the legal use of the J-Link software with original SEGGER and OEM products. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 31: Components Requiring A License
Components requiring a license Components requiring a license J-Link PLUS and higher are fully featured J-Links and come with all licenses included. Other models may do not come with all features enabled. For a detailed overview of the included licenses of the SEGGER debug probes, please refer to:...
Page 32: Legal Use Of Segger J-Link Software
Use of software SEGGER J-Link software may only be used with original SEGGER products and authorized OEM products. The use of the licensed software to operate SEGGER product clones is pro- hibited and illegal. 2.2.1...
Page 33: Illegal Clones
If you are in doubt if your unit may be legally used with SEGGER J-Link software, please get in touch with us. End users may be liable for illegal use of J- Link software with clones.
Page 34: J-Link Software And Documentation Package
Chapter 3 J-Link software and documentation package This chapter describes the contents of the J-Link Software and Documentation Package which can be downloaded from www.segger.com J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 35: Software Overview
Free command-line tools for handling specific processors. Processor specific tools Included are: STR9 Commander and STM32 Unlock. Full-featured J-Link (PLUS, PRO, ULTRA+) or an additional license for J-Link base model required. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 36: J-Link Commander (Command Line Tool)
J-Link Commander (Command line tool) J-Link Commander (Command line tool) J-Link Commander (JLink.exe) is a tool that can be used for verifying proper installation of the USB driver and to verify the connection to the target CPU, as well as for simple analysis of the target system.
Page 37 Read and display file from emulator. fsize (fsz) Display size of file on emulator. fwrite (fwr) Write file to emulator. Connection Connect to J-Link Pro via TCP/IP. Connect to J-Link via USB. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 38 3.2.1.3 device Selects a specific device J-Link shall connect to and performs a reconnect. In most cases explicit selection of the device is not necessary. Selecting a device enables the user to make use of the J-Link flash programming functionality as well as using unlimited breakpoints in flash memory.
Page 39 Command string to be executed. Command Example exec SupplyPower = 1 3.2.1.6 exit This command closes the target connection, the connection to the J-Link and exits J-Link Commander. Syntax 3.2.1.7 exitonerror This command toggles whether J-Link Commander exits on error or not.
Page 40 On emulators which support file I/O this command gets the size of a specific file. Currently, only Flasher models support file I/O. Syntax fsize <FileName>] Parameter Meaning Source file name to read from the Flasher. FileName Example fsize Flasher.dat J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 41 This command can be used to get information about the power consumption of the target (if the target is powered via J-Link). It also gives the information if an overcurrent happened. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 42 CHAPTER 3 J-Link Commander (Command line tool) Syntax hwinfo 3.2.1.18 Closes any existing connection to J-Link and opens a new one via TCP/IP. If no IP Address is specified, the Emulator selection dialog shows up. Syntax ip [<Addr>] Parameter Meaning...
Page 43 [<Zone>:]<Addr>, <NumBytes> (hex) Parameter Meaning Name of memory zone to access. Zone Start address. Addr Number of halfwords to read. Maximum is 0x80000. Numbytes Example mem16 0, 100 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 44 Number of times the test is repeated (Default: 1). RepCount Example mr 3 3.2.1.28 Measures the number of bits in the specified scan chain. Syntax ms <ScanChain> Parameter Meaning Scan chain to be measured. ScanChain J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 45 This command sets the status of the power supply over pin 19 of the JTAG connector. The KS(Kickstart) versions of J-Link have the 5V supply over pin 19 activated by default. This feature is useful for some targets that can be powered over the JTAG connector.
Page 46 (MMU) or the external bus interface. Syntax rx <DelayAfterReset> Parameter Meaning DelayAfterRe- Delay in ms. Example rx 10 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 47 Moreover the bits DBGEXT, CHAIN and the RANGE bit (used to J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 48 This command sets the speed for communication with the CPU core. Syntax speed <Freq>|auto|adaptive Parameter Meaning Specifies the interface frequency in kHz. Freq Selects auto detection of the interface speed. auto Selects adaptive clocking as JTAG speed. adaptive J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 49 LM3Sxxx DeviceName Kinetis EFM32Gxxx Example unlock Kinetis 3.2.1.46 Closes any existing connection to J-Link and opens a new one via USB. It is possible to select a specific J-Link by port number. Syntax usb [<Port>] Parameter Meaning Valid values: 0..3...
Page 50 The command writes a unit of 32-bits to the target system. Syntax w4 [<Zone>:]<Addr>, <Data> (hex) Parameter Meaning Name of memory zone to access. Zone Start address. Addr 32-bits of data to write. Data J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 51 Writes into a register. The value is written into the register on CPU start. Syntax wreg <RegName>, <Data> Parameter Meaning Register to write to. RegName Data to write to the specified register. Data J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 52: Command Line Options
Selects a command file and starts J-Link Commander in batch mode. The batch mode of J-Link Commander is similar to the execution of a batch file. The command file is parsed line by line and one command is executed at a time.
Page 53 3.2.2.8 -JLinkScriptFile Passes the path of a J-Link script file to the J-Link Commander. J-Link scriptfiles are mainly used to connect to targets which need a special connection sequence before communication with the core is possible. For more information about J-Link script files, please refer to J- Link Script Files .
Page 54 -RTTTelnetPort <Port> Example JLink.exe -RTTTelnetPort 9100 3.2.2.12 -SettingsFile Select a J-Link settings file to be used for the target device. The settings file can contain all configurable options of the Settings tab in J-Link Control panel. Syntax -SettingsFile <PathToFile> Example JLink.exe -SettingsFile “C:\Work\settings.txt”...
Page 55: Using Command Files
3.2.3 Using command files J-Link commander can also be used in batch mode which allows the user to use J-Link com- mander for batch processing and without user interaction. Please do not confuse command file with J-Link script files (please refer to J-Link script files for more information about J- Link script files).
Page 56: J-Link Gdb Server
IDEs like emIDE or Eclipse. J-Link GDB Server is a remote server for GDB making it possible for GDB to connect to and communicate with the target device via J-Link. GDB Server and GDB communicate via a TCP/IP connection, using the standard GDB remote protocol.
Page 57 (-device) is given, the configuration dialog will not pop up. 3.3.2.2 Setting up GDB Server CL version The command line version of GDB Server is part of the J-Link Software Package for all supported platforms. On Windows its name is JLinkGDBServerCL.exe, on Linux and Mac it is JLinkGDBServer.
Page 58 Stay on top • Show log window. • Generate logfile: If checked, a log file with the GDB <-> GDB Server <-> J-Link communication will be created. • Verify download: If checked, the memory on the target will be verified after download.
Page 59 The screenshot below shows a debug session in IDE. For download and more information about emIDE, please refer to http://emide.org . Console GDB can be used stand-alone as a console application. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 60: Supported Remote (Monitor) Commands
3.3.3 Supported remote (monitor) commands J-Link GDB Server comes with some functionalities which are not part of the standard GDB. These functions can be called either via a gdbinit file passed to GDB Server or via monitor commands passed directly to GDB, forwarding them to GDB Server.
Page 61 Performs one or more single instruction steps. SWO DisableTarget Undo target configuration for SWO and disable it in J-Link. SWO EnableTarget Configure target for SWO and enable it in J-Link. Prints the maximum supported SWO speed for J-Link and SWO GetMaxSpeed Target CPU.
Page 62 > monitor cp15 1, 2, 6, 7 < Reading CP15 register (1,2,6,7 = 0x0460B77D) #Write: > monitor cp15 1, 2, 6, 7 = 0xFFFFFFFF 3.3.3.3 device Note Deprecated. Use command line option -device instead. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 63 Get the currently set argument list which will be given to the application when calling semihosting command SYS_GET_CMDLINE (0x15). The argument list is given as one string. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 64 3.3.3.10 interface Note Deprecated. Use command line option instead. Selects the target interface used by J-Link / J-Trace. Syntax interface <InterfaceIdentifier> 3.3.3.11 jtagconf Configures a JTAG scan chain with multiple devices on it. <IRPre> is the sum of IRLens of all devices closer to TDI, where IRLen is the number of bits in the IR (Instruction Register) of one device.
Page 65 Reads or writes a word from/to a given address. If <value> is specified, this command writes the value to the given address. Otherwise this command reads from the given address. This command is similar to the long command. Syntax memU32 <address> [= <value>] J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 66 FIQ: R8 =00000000, R9 =00000000, R10=00000000, R11 =00000000, R12 =00000000 R13=00200000, R14=00000000, SPSR=00000010 SVC: R13=002004E8, R14=0010025C, SPSR=00000010 ABT: R13=00200100, R14=00000000, SPSR=00000010 IRQ: R13=00200100, R14=00000000, SPSR=00000010 UND: R13=00200100, R14=00000000, SPSR=00000010 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 67 Note There are different reset strategies for different CPUs. Moreover, the reset strategies which are available differ from CPU core to CPU core. J-Link can perform various reset strategies and always selects the best fitting strategy for the selected device.
Page 68 SYS_GET_CMDLINE (0x15). Semihosting has to be enabled for getting the ar- gumentstring (see semihosting enable ). “monitor setargs” can be used before enabling semihosting. The maximum length for <ArgumentString> is 512 characters. Syntax setargs <ArgumentString> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 69 -speed instead. Sets the JTAG speed of J-Link / J-Trace. Speed can be either fixed (in kHz), automatic recognition or adaptive. In general, Adaptive is recommended if the target has an RTCK signal which is connected to the corresponding RTCK pin of the device (S-cores only). For detailed information about the different modes, refer to JTAG Speed .
Page 70 < SWO disabled successfully. 3.3.3.29 SWO EnableTarget Configures the target to be able to output SWO data and starts J-Link to capture it. CPU and SWO frequency can be 0 for auto-detection. If CPUFreq is 0, J-Link will measure the current CPU speed.
Page 71 #Configure SWO for stimulus ports 0-255, fixed CPU and SWO frequency > monitor SWO EnableTarget 72000000 6000000 0xFF 0 < SWO enabled successfully. 3.3.3.30 SWO GetMaxSpeed Prints the maximum SWO speed supported by and matching both, J-Link and the target CPU frequency. Syntax SWO GetMaxSpeed <CPUFrequency [Hz]> Example #Get SWO speed for 72MHz CPU speed >...
Page 72: Segger-Specific Gdb Protocol Extensions
3.3.4 SEGGER-specific GDB protocol extensions J-Link GDB Server implements some functionality which are not part of the standard GDB remote protocol in general query packets. These SEGGER-specific general query packets can be sent to GDB Server on the low-level of GDB, via maintenance commands, or with a custom client connected to GDB Server.
Page 73 ReturnValue is hex-encoded. Return value 0 is “00000000”, return value -1 is “FFFFFFFF”. 3.3.4.2 qSeggerSTRACE:start Starts capturing of STRACE data. Note For more information please refer to UM08002 (J-Link SDK user guide), chapter STRACE . Syntax qSeggerSTRACE:start Response <ReturnValue> ReturnValue is a 4 Byte signed integer.
Page 74 3.3.4.4 qSeggerSTRACE:read Reads the last recently called instruction addresses. The addresses are returned LIFO, meaning the last recent address is returned first. Note For more information please refer to UM08002 (J-Link SDK user guide), chapter STRACE . Syntax qSeggerSTRACE:read:<NumItems> Parameter Meaning Maximum number of trace data (addresses) to be read.
Page 75 ReturnValue is the hexadecimal number of bytes in the buffer or empty on error. 3.3.4.9 qSeggerSWO:GetSpeedInfo Returns the base frequency and the minimum divider of the connected J-Link. With this information, the available SWO speeds for J-Link can be calculated and the matching one for the target CPU frequency can be selected.
Page 76: Command Line Options
Command line options There are several command line options available for the GDB Server which allow configu- ration of the GDB Server before any connection to a J-Link is attempted or any connection from a GDB client is accepted. Note Using GDB Server CL, device, interface, endian and speed are mandatory options to correctly connect to the target, and should be given before connection via GDB.
Page 77 -singlerun Starts GDB Server in single run mode. -jlinkscriptfile Specifies a J-Link script file. -select Selects the interface to connect to J-Link (USB/IP). -settingsfile Selects the J-Link Settings File. -strict Starts GDB Server in strict mode. Executes a gdb file on first connection.
Page 78 When using GDB Server CL this option is mandatory to correctly connect to the target, and should be given before connection via GDB. 3.3.5.4 Selects the target interface which is used by J-Link to connect to the device. The default value is JTAG. Syntax -if <Interface>...
Page 79 TDI, where IRLen is the number of bits in the IR (Instruction Register) of one device. <DRPre> is the number of devices closer to TDI. For more detailed information J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 80 -log , the log file will be created in the GDB Server application directory. Note For the GUI version, this setting is persistent for following uses of GDB Server until changed via -nologtofile or the GUI. Syntax logtofile J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 81 For the GUI version, this setting is persistent for following uses of GDB Server until changed via -nologtofile or the GUI. When this option is used after -log, no log file J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 82 For the CL version this setting has no effect. For the GUI version, this setting is per- sistent for following uses of GDB Server until changed via command line option or the GUI. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 83 This command line option prevents GDB Server from closing, to allow connecting a target after starting GDB Server. Note The recommended order is to power the target, connect it to J-Link and then start GDB Server. Syntax -notimeout 3.3.5.19...
Page 84 3.3.5.22 -jlinkscriptfile Passes the path of a J-Link script file to the GDB Server. This scriptfile is executed before the GDB Server starts the debugging / identifying communication with the target. J-Link scriptfiles are mainly used to connect to targets which need a special connection sequence before communication with the core is possible.
Page 85 In normal run mode GDB Server will stay open and wait for new connections. When started in single run mode GDB Server will close immediately when connecting to the target fails. Make sure it is powered and connected to J-Link before starting GDB Server.
Page 86 Currently the device name is checked. If no device name is given or the device is unknown to the J-Link, GDB Server exits instead of selecting “Unspecified” as device or showing the device selection dialog.
Page 87: Program Termination
3.3.6 Program termination J-Link GDB Server is normally terminated by a close or Ctrl-C event. When the single run mode is active it will also close when an error occurred during start or after all connections to GDB Server are closed.
Page 88: Semihosting
CHAPTER 3 J-Link GDB Server 3.3.6.1 Exit codes J-Link GDB Server terminates with an exit code indicating an error by a non-zero exit code. The following table describes the defined exit codes of GDB Server. Exit code Description No error. GDB Server closed normally.
Page 89: J-Link Remote Server
J-Link Remote Server J-Link Remote Server allows using J-Link / J-Trace remotely via TCP/IP. This enables you to connect to and fully use a J-Link / J-Trace from another computer. Performance is just slightly (about 10%) lower than with direct USB connection.
Page 90 SEGGER is not possible. Instead the vendor can connect the device via J-Link to a local computer and start the Remote server in tunneling mode. The serial number of the J-Link is then sent to a to an engineer at SEGGER.
Page 91 Start J-Link Remote Server in tunneling mode Connect to the J-Link / J-Trace via J-Link Commander J-Link Commander can be used to verify a connection to the J-Link can be established as follows: Start J-Link Commander From within J-Link Commander enter ip tunnel:<SerialNo>...
Page 92 To test whether a connection to the tunnel server can be established or not a network protocol analyzer like Wireshark can help. The network transfer of a successful connection should look like: J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 93: J-Mem Memory Viewer
You can choose between 8/16/32-bit size for read and write accesses. J-Mem works nicely when modifying SFRs, especially because it writes the SFR only after the complete value has been entered. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 94: J-Flash
J-Flash is an application to program data images to the flash of a target device. With J- Flash the internal flash of all J-Link supported devices can be programmed, as well as common external flashes connected to the device. Beside flash programming all other flash operations like erase, blank check and flash content verification can be done.
Page 95: J-Link Rtt Viewer
CHAPTER 3 J-Link RTT Viewer J-Link RTT Viewer J-Link RTT Viewer is a Windows GUI application to use all features of RTT in one application. It supports: • Displaying terminal output of Channel 0. • Up to 16 virtual Terminals on Channel 0.
Page 96: Connection Settings
Select USB or TCP/IP as the connection to J-Link. For USB a specific J-Link serial number can optionally be entered, for TCP/IP the IP or hostname of the J-Link has to be entered. Select the target device to connect to. This allows J-Link to search in the known RAM of the target.
Page 97: Sending Input
RTT Channel 1 into a file. This can for example be used to sent instrumented event tracing data. The data log file contains header and footer and the binary data as received from the application. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 98: Command Line Options
–connection <usb|ip|sess> Example JLinkRTTViewer.exe –connection ip 3.7.7.3 --interface Sets the interface J-Link shall use to connect to the target. As interface types FINE, JTAG and SWD are supported. Syntax –interface <fine|jtag|swd> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 99 JLinkRTTViewer.exe –interface swd 3.7.7.4 --host Enter the IP address or hostname of the J-Link. This option only applies, if connection type IP is used. Use * as <IPAddr> for a list of available J-Links in the local subnet. Syntax –host <IPAddr>...
Page 100: Menus And Shortcuts
CHAPTER 3 J-Link RTT Viewer Example JLinkRTTViewer.exe -rttrange “20000000 400” 3.7.7.9 --autoconnect Let J-Link RTT Viewer connect automatically to the target without showing the Connection Settings (see Connection Settings ). Syntax –autoconnect Example JLinkRTTViewer.exe –autoconnect 3.7.8 Menus and Shortcuts File menu elements...
Page 101: Using "Virtual" Terminals In Rtt
RTT Viewer supports changing the text color and background color and can erase the Ter- minal. These Control Codes are pre-defined in the RTT application and can easily be used in the application. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 102 RTT_CTRL_RESET, RTT_CTRL_BG_BRIGHT_RED, RTT_CTRL_TEXT_BRIGHT_WHITE, 1111111 // Clear the terminal. // The first line will not be shown after this command. SEGGER_RTT_WriteString(0, RTT_CTRL_CLEAR); SEGGER_RTT_printf(0, "%sTime: %s%s%.7d\n", RTT_CTRL_RESET, RTT_CTRL_BG_BRIGHT_RED, RTT_CTRL_TEXT_BRIGHT_WHITE, 2222222 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 103: J-Link Swo Viewer
Command line-only version of SWO Viewer. All commands available for J-Link SWO Viewer can be used with J-Link SWO Viewer Cl. Similar to the GUI Version, J-Link SWO Viewer Cl asks for a device name or CPU clock speed at startup to be able to calculate the correct SWO speed or to connect to a running J-Link GDB Server.
Page 104: Usage
3.8.1 Usage J-Link SWO Viewer is available via the start menu. It asks for a device name or CPU clock speed at startup to be able to calculate the correct SWO speed or to connect to a running J-Link GDB Server.
Page 105 3.8.2.7 -swofreq Define the SWO frequency that shall be used by J-Link SWO Viewer for sampling SWO data. Usually not necessary to define since optimal SWO speed is calculated automatically based on the CPU frequency and the capabilities of the connected J-Link.
Page 106: Configure Swo Output After Device Reset
DWT_CTRL = 0x400003FE; FFCR = 0x00000100; // Enable ITM and stimulus port ITM_TCR = 0x1000D; // Enable ITM ITM_ENA = StimulusRegs | << _ITMPort); // Enable ITM stimulus port J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 107: Target Example Code For Terminal Output
3.8.4 Target example code for terminal output /********************************************************************* SEGGER MICROCONTROLLER GmbH & Co KG Solutions for real time microcontroller applications ********************************************************************** (c) 2012-2017 SEGGER Microcontroller GmbH & Co KG www.segger.com Support: support@segger.com ********************************************************************** ---------------------------------------------------------------------- File : SWO.c Purpose : Simple implementation for output via SWO for Cortex-M processors.
Page 108 ITM_STIM_U8 = c; /********************************************************************* SWO_PrintString() * Function description Print a string via SWO. void SWO_PrintString(const char *s) { // Print out character per character while (*s) { SWO_PrintChar(*s++); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 109: Swo Analyzer
Usage SWOAnalyzer.exe <SWOfile> This can be achieved by simply dragging the SWO output file created by the J-Link DLL onto the executable. Creating an SWO output file In order to create the SWO output file, which is the input file for the SWO Analyzer, the J- Link config file needs to be modified.
Page 110: Jtagload (Command Line Tool)
JTAGLoad is a tool that can be used to open and execute an svf (Serial vector format) file for JTAG boundary scan tests. The data in the file will be sent to the target via J-Link / J-Trace. SVF is a standard format for boundary scan vectors to be used with different tools and targets.
Page 111: J-Link Rdi (Remote Debug Interface)
3.11 J-Link RDI (Remote Debug Interface) The J-Link RDI software is a remote debug interface for J-Link. It makes it possible to use J-Link with any RDI compliant debugger. The main part of the software is an RDI-compliant DLL, which needs to be selected in the debugger. here are two additional features available which build on the RDI software foundation.
Page 112: Processor Specific Tools
3.12.1 J-Link STR91x Commander (Command line tool) J-Link STR91x Commander (JLinkSTR91x.exe) is a tool that can be used to configure STR91x cores. It permits some STR9 specific commands like: • Set the configuration register to boot from bank 0 or 1.
Page 113 Quit Command line options J-Link STR91x Commander can be started with different command line options for test and automation purposes. In the following, the command line options which are available for J-Link Commander are explained. All command line options are case insensitive.
Page 114 Selects a command file and starts J-Link STR91x Commander in batch mode. The batch mode of J-Link STR91x Commander is similar to the execution of a batch file. The command file is parsed line by line and one command is executed at a time.
Page 115: J-Link Stm32 Unlock (Command Line Tool)
Processor specific tools 3.12.1.5 -SelectEmuBySN Connect to a J-Link with a specific serial number via USB. Useful if multiple J-Links are connected to the same PC and multiple instances of J-Link Commander shall run and each connects to another J-Link.
Page 116 To select from a list of all available emulators on Ethernet, please use * as <IPAddr>. 3.12.2.2 -SelectEmuBySN Connect to a J-Link with a specific serial number via USB. Useful if multiple J-Links are connected to the same PC. Syntax -SelectEmuBySN <SerialNo>...
Page 117 JLinkSTM32.exe -SetDeviceFamily STM32F2xxxx // Selects STM32F2 series} 3.12.2.6 -Exit In general, the J-Link STM32 utility waits at the end of the unlock process for any user input before application closes. This option allows to skip this step, so that the utility closes automatically.
Page 118: J-Link Software Developer Kit (Sdk)
3.13 J-Link Software Developer Kit (SDK) The J-Link Software Developer Kit is needed if you want to write your own program with J- Link / J-Trace. The J-Link DLL is a standard Windows DLL typically used from C programs (Visual Basic or Delphi projects are also possible). It makes the entire functionality of J- Link / J-Trace available through its exported functions, such as halting/stepping the CPU core, reading/writing CPU and ICE registers and reading/writing memory.
Page 119: Setup
Chapter 4 Setup This chapter describes the setup procedure required in order to work with J-Link / J-Trace. Primarily this includes the installation of the J-Link Software and Documentation Package, which also includes a kernel mode J-Link USB driver in your host system.
Page 120: Installing The J-Link Software And Documentation Pack
J-Link is shipped with a bundle of applications, corresponding manuals and some example projects and the kernel mode J-Link USB driver. Some of the applications require an addi- tional license, free trial licenses are available upon request from www.segger.com Refer to chapter J-Link software and documentation package on page 34 for an overview of the J-Link Software and Documentation Pack.
Page 121: Setting Up The Usb Interface
J-Link firmware, the serial number, a target voltage of 0.000V, a complementary error message, which says that the supply voltage is too low if no target is connected to J-Link / J-Trace, and the speed selection. The screenshot below shows an example.
Page 122: Uninstalling The J-Link Usb Driver
The LED on the J-Link / J-Trace is rapidly flashing. • The J-Link / J-Trace is recognized as Unknown Device by Windows. To have a clean system and help Windows to reinstall the J-Link driver, follow this proce- dure: J-Link / J-Trace (UM08001)
Page 123 1. Disconnect J-Link / J-Trace from your PC. 2. Open the Add/Remove Programs dialog ( Start > Settings > Control Panel > Add/ Remove Programs ) select Windows Driver Package - Segger (jlink) USB and click the Change/Remove button. 3. Confirm the uninstallation process.
Page 124: Setting Up The Ip Interface
In addition to that, you can set a default gateway for the emulator which allows using it even in large intranets. For simplicity the setup process of J-Link Pro (referred to as J-Link) is described in this section.
Page 125 CHAPTER 4 Setting up the IP interface J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 126: Faqs
FAQs FAQs Q: How can I use J-Link with GDB and Ethernet? A: You have to use the J-Link GDB Server in order to connect to J-Link via GDB and Ethernet. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 127: J-Link Configurator
(use DHCP, IP address, subnet mask, …) of a J-Link supporting the Ethernet interface, SEGGER provides a GUI-based tool, called J-Link Configurator. The J-Link Configurator is part of the J-Link Software and Documentation Package and can be used free of charge. 4.5.1...
Page 128 CHAPTER 4 J-Link Configurator In order to configure an old J-Link, which uses the old USB 0 - 3 USB identification method, to use the new USB identification method (reporting the real serial number) simply select “Real SN” as USB identification method and click the OK button. The same dialog also allows configuration of the IP settings of the connected J-Link if it supports the Ethernet interface.
Page 129: J-Link Usb Identification
J-Links are connected to the PC and shows a selection dialog which allows the user to select the appropriate J-Link to connect to. So even in IDEs which do not have an selection option for the J-Link, it is possible to connect to different J-Links.
Page 130: Using The J-Link Dll
The J-LinkARM.dll is a standard Windows DLL typically used from C or C++, but also Visual Basic or Delphi projects. It makes the entire functionality of the J-Link / J-Trace available through the exported functions. The functionality includes things such as halting/stepping the ARM core, reading/writing CPU and ICE registers and reading/writing memory.
Page 131: Determining Which Dll Is Used By A Program
Explorer. It shows you details about the DLLs used by your program, such as manufacturer and version. Process Explorer is - at the time of writing - a free utility which can be downloaded from www.sysinternals.com . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 132: Working With J-Link And J-Trace
Chapter 5 Working with J-Link and J- Trace This chapter describes functionality and how to use J-Link and J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 133: Supported Ides
For a list of supported 3rd-party debuggers and IDEs and documentation on how to get started with those IDEs and J-Link / J-Trace es well as on how to use the advanced features of J-Link / J-Trace with any of them, please refer to:...
Page 134: Connecting The Target System
J-Link / J-Trace related information and in addition to that it should report that it found a JTAG target and the target’s core ID. The screenshot below shows the output of JLink.exe . As can be seen, it reports a J-Link with one JTAG device connected.
Page 135: Indicators
5.3.1 Main indicator For J-Links up to V7, the main indicator is single color (Green). J-Link V8 comes with a bi- color indicator (Green & Red LED), which can show multiple colors: green, red and orange. 5.3.1.1...
Page 136: Output Indicator
5.3.3 Output indicator Some newer J-Links such as the J-Link Pro/Ultra come with additional input/output indica- tors. The output indicator is used to give the user some information about the emulator-to- target connection.
Page 137: Jtag Interface
5.4.1 Multiple devices in the scan chain J-Link / J-Trace can handle multiple devices in the scan chain. This applies to hardware where multiple chips are connected to the same JTAG connector. As can be seen in the following figure, the TCK and TMS lines of all JTAG device are connected, while the TDI and TDO lines form a bus.
Page 138 SEGGER J-Link RDI configuration dialog box This dialog can be found under RDI|Configure for example in IAR Embedded WorkbenchÂ®. For detailed information check the IAR Embedded Workbench user guide. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 139: Determining Values For Scan Chain Configuration
If only one device is connected to the scan chain, the default configuration can be used. In other cases, J-Link / J-Trace may succeed in automatically recognizing the devices on the scan chain, but whether this is possible depends on the devices present on the scan chain.
Page 140: Jtag Speed
JTAG interface. If you use the adaptive clocking feature, transmission delays, gate delays, and synchronization requirements result in a lower maximum clock frequency than with non-adaptive clocking. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 141: Swd Interface
The SWD speed which is used for target communication should not exceed target CPU speed * 10 . The maximum SWD speed which is supported by J-Link depends on the hardware version and model of J-Link. For more information about the maximum SWD speed for each J-Link / J-Trace model, please refer to J-Link / J-Trace models on page 29.
Page 142 Example 2 Target CPU running at 10 MHz. Possible SWO output speeds are: 10MHz, 5MHz, 3.33MHz, ... J-Link V7: Supported SWO input speeds are: 6MHz / n, n>= 1: 6MHz, 3MHz, 2MHz, 1.5MHz, ... Permitted combinations are: SWO output SWO input...
Page 143: Multi-Core Debugging
All that is required is proper setup of the scan chain for each debugger. This enables J-Link / J-Trace to debug more than one core on a target at the same time. The following figure shows a host, debugging two CPU cores with two instances of the same debugger.
Page 144: Using Multi-Core Debugging In Detail
Multi-core debugging 5.6.2 Using multi-core debugging in detail 1. Connect your target to J-Link / J-Trace. 2. Start your debugger, for example IAR Embedded Workbench for ARM. 3. Choose Project|Options and configure your scan chain. The picture below shows the configuration for the first CPU core on your target.
Page 145: Things You Should Be Aware Of
All cores share the same RESET line. You should be aware that resetting one core through the RESET line means resetting all cores which have their RESET pins connected to the RESET line on the target. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 146: Connecting Multiple J-Links / J-Traces To Your Pc
J-Links connected to the same host at the same time. In order to connect to the correct J-Link, the user has to make sure that the correct J-Link is selected (by SN or IP). In cases where no specific J-Link is selected, following pop up will shop and allow the user to select the proper J-Link: The sketch below shows a host, running two application programs.
Page 147 For example, old IAR EWARM versions supports connecting to a J-Link via the USB0-3 method only. As soon as more than one J-Link is connected to the pc, there is no opportunity to pre-select the J-Link which should be used for a debug session.
Page 148: J-Link Control Panel
Since software version V3.86 J-Link the J-Link control panel window allows the user to monitor the J-Link status and the target status information in real-time. It also allows the user to configure the use of some J-Link features such as flash download, flash breakpoints and instruction set simulation.
Page 149 Save settings, otherwise they are lost when the debug session is closed. Section: Flash download In this section, settings for the use of the J-Link FlashDL feature and related settings can be configured. When a license for J-Link FlashDL is found, the color indicator is green and “License found”...
Page 150 Save settings: When this button is pushed, the current settings in the Settings tab will be saved in a configuration file. This file is created by J-Link and will be created for each project and each project configuration (e.g. Debug_RAM, Debug_Flash). If no settings file is given, this button is not visible.
Page 151 Note It is possible for the debugger to bypass the breakpoint functionality of the J-Link soft- ware by writing to the debug registers directly. This means for ARM7/ARM9 cores write accesses to the ICE registers, for Cortex-M3 devices write accesses to the memory mapped flash breakpoint registers and in general simple write accesses for software breakpoints (if the program is located in RAM).
Page 152 In this section the name and the value of the CPU registers are shown. 5.8.1.6 Target Power In this section currently just the power consumption of the target hardware is shown. 5.8.1.7 In this section SWV information are shown. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 153 J-Link control panel • Status: Shows the encoding and the baudrate of the SWV data received by the target (Manchester/UART, currently J-Link only supports UART encoding). • Bytes in buffer: Shows how many bytes are in the DLL SWV data buffer.
Page 154: Reset Strategies
Some CPUs can actually be halted before executing any instruction, because the start of the CPU is delayed after reset release. If a pause has been specified, J-Link waits for the specified time before trying to halt the CPU. This can be useful if a bootloader which resides in flash or ROM needs to be started after reset.
Page 155: Strategies For Cortex-M Devices
5.9.1.5 Type 4: Hardware, halt with WP The hardware RESET pin is used to reset the CPU. After reset release, J-Link continuously tries to halt the CPU using a watchpoint. This typically halts the CPU shortly after reset release; the CPU can in most systems execute some instructions before it is halted.
Page 156 Type 2: ResetPin J-Link pulls its RESET pin low to reset the core and the peripherals. This normally causes the CPU RESET pin of the target device to go low as well, resulting in a reset of both CPU and peripherals.
Page 157 (reset no longer active) afterwards. 4. Clear VC_CORERESET. This type of reset may fail if: • J-Link has no connection to the debug interface of the CPU because it is in a low power mode. • The debug interface is disabled after reset and needs to be enabled by a device internal bootloader.
Page 158 CHAPTER 5 Reset strategies quest or halted by vector catch). When using this reset strategy, J-Link performs a reset of the CPU and peripherals, using the SYSRESETREQ bit and sets VC_CORERESET in order to halt the CPU after reset, before it executes a single instruction. Then the watchdog of the S3FN60D device is disabled.
Page 159: Using Dcc For Memory Access
DCC handler from time to time. This DCC handler typically requires less than 1 s per call. The DCC handler, as well as the optional DCC abort handler, is part of the J-Link software package and can be found in the Samples\DCC\IAR directory of the package.
Page 160: The J-Link Settings File
Most IDEs provide a path to a J-Link settings file on a per-project-per-debug-configuration basis. This file is used by J-Link to store various debug settings that shall survive between debug sessions of a project. It also allows the user to perform some override of various settings.
Page 161: J-Link Script Files
J-Link software. J-Link script files are written in C-like syntax in order to have an easy start to learning how to write J-Link script files. The script file syntax supports most statements (if-else, while, declaration of variables, …) which are allowed in C, but not all of them.
Page 162 Currently this function is only used to configure whether the target which is connected to J-Link has an ETB or not. For more information on how to configure the existence of an ETB, please refer to Global DLL variables .
Page 163: Script File Api Functions
JLINK_JTAG_GetU32() int JLINK_JTAG_Reset(void); JLINK_JTAG_Reset() int JLINK_JTAG_SetDeviceId(int DeviceIndex, U32 Id); JLINK_JTAG_SetDeviceId() int JLINK_JTAG_Store(U32 tms, U32 tdi, U32 NumBits); JLINK_JTAG_Store() int JLINK_JTAG_StoreClocks(int NumClocks); JLINK_JTAG_StoreClocks() int JLINK_JTAG_StoreDR(U32 tdi, int NumBits); JLINK_JTAG_StoreDR() J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 164 This makes sense on targets on which J-Link can not perform a auto-detection of the APs which are present on the target system. Type can only be a known global J-Link DLL AP constant. For a list of all available constants, please refer to Global DLL constants .
Page 165 For SWD The JTAG -> SWD switching sequence is output. It is also made sure that the “overrun mode enable” bit in the SW-DP CTRL/STAT register is cleared, as in SWD mode J-Link always assumes that overrun detection mode is disabled.
Page 166 Prototype int JLINK_WriteDAP(int RegIndex, int APnDP, U32 Data); Parameter Description Specifies the index of the AP/DP RegIndex register to write. 0: DP register APnDP 1: AP register J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 167 Error Not supported by the current CPU + target interface combination Example JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_ABORT, 0, 0x1E); 5.12.2.8 JLINK_ExecCommand() Gives the option to use Command strings in the J-Link script file. Prototype int JLINK_ExecCommand(const char* sMsg); Example JLINK_ExecCommand("TraceSampleAdjust TD=2000"); Note Has no effect when executed in Flasher stand-alone mode or when calling this function from a function that implements the __probe attribute.
Page 168 DLL variables. For more information about the known global DLL variables, please refer to Global DLL variables . Prototype int JLINK_JTAG_StoreIR(U32 Cmd); 5.12.2.17 JLINK_JTAG_Write() Writes a JTAG sequence (max. 64 bits per pin). J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 169 DLL variables, please refer to Global DLL variables . Prototype int JLINK_JTAG_WriteIR(U32 Cmd); 5.12.2.23 JLINK_MemRegion() This command is used to specify memory areas with various region types. Syntax map region <StartAddressOfArea>-<EndAddressOfArea> <RegionType> Region type Description Normal J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 170 JLINK_MEM_WriteU32(U32 Addr, U32 Data); 5.12.2.27 JLINK_MEM_ReadU8() Reads a byte from the specified address. Prototype U8 MEM_ReadU8 (U32 Addr); 5.12.2.28 JLINK_MEM_ReadU16() Reads a halfword from the specified address. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 171 Prototype int JLINK_SYS_Report1(const char * sMsg, int v); 5.12.2.34 JLINK_SYS_Sleep() Waits for a given number of milliseconds. During this time, J-Link does not communicate with the target. Prototype int JLINK_SYS_Sleep(int Delayms); 5.12.2.35 JLINK_SYS_UnsecureDialog() Informs the user that the device needs to be unsecured for further debugging.
Page 172: Global Dll Variables
Variable is read-only Variable is write-only Variable is R/W: read-write Variable Description Pre-selects target CPU J-Link is communicating with. Used in InitTarget() to skip the core autodetection of J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 173 CHAPTER 5 J-Link script files Variable Description J-Link. This variable can only be set to a known glob- al J-Link DLL constant. For a list of all valid values, please refer to Global DLL constants Example CPU = ARM926EJS; Used for JTAG chain configuration. Sets the number of IR-bits of all devices which are closer to TDO than the one we want to communicate with.
Page 174 Example JLINK_TRACE_Portwidth = 4; If the connected device has an ETB and you want to use it with J-Link, this variable should be set to 1. Set- ting this variable in another function as InitEmu() does not have any effect.
Page 175 CORESIGHT_IndexAPBAPToUse = 2; Overrides the default settings to be used by the DLL when configuring the AHB-AP CSW register. By de- fault, the J-Link DLL will use the following settings for the CSW: Cortex-M0, M0+, M3, M4 [30] = 0...
Page 176: Global Dll Constants
• ARM7TDMISR3 • ARM7TDMISR4 • ARM9 • ARM9TDMIS • ARM920T • ARM922T • ARM926EJS • ARM946EJS • ARM966ES • ARM968ES • ARM11 • ARM1136 • ARM1136J • ARM1136JS J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 177 • JLINK_CORESIGHT_AP_REG_ROM • JLINK_CORESIGHT_AP_REG_IDR 5.12.4.3 Constants for global variable "JLINK_ActiveTIF" • JLINK_TIF_JTAG • JLINK_TIF_SWD 5.12.4.4 Constants for global variable "JLINK_TargetEndianness" • JLINK_TARGET_ENDIANNESS_I_LITTLE_D_LITTLE • JLINK_TARGET_ENDIANNESS_I_LITTLE_D_BIG • JLINK_TARGET_ENDIANNESS_I_BIG_D_LITTLE • JLINK_TARGET_ENDIANNESS_I_BIG_D_BIG J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 178: Script File Language
5.12.5 Script file language The syntax of the J-Link script file language follows the conventions of the C-language, but it does not support all expressions and operators which are supported by the C-language. In the following, the supported operators and expressions are listed.
Page 179: Script File Writing Example
5.12.6 Script file writing example In the following, a short example of how a J-Link script file could look like. In this example we assume a JTAG chain with two devices on it (Cortex-A8 4 bits IRLen, custom device 5-bits IRLen).
Page 180: Command Strings
5.13 Command strings The behavior of the J-Link can be customized via command strings passed to the JLinkAR- M.dll which controls J-Link. Applications such as J-Link Commander, but also the C-SPY debugger which is part of the IAR Embedded Workbench, allow passing one or more com- mand strings.
Page 181 Restores the default mapping, which means all memory accesses map reset are permitted. Specifies a file or directory which should be used by the J-Link ProjectFile DLL to save the current configuration. Reads the given memory area into the streaming trace instruc- ReadIntoTraceCache tion cache.
Page 182 This command is used to select a specific APB-AP to be used when connected to an ARM Cortex-A or Cortex-R device. Usually, it is not necessary to explicitly select an AHB-AP to be used, as J-Link auto-detects the AP automatically. For multi-core systems with multiple APB-APs it might be necessary.
Page 183 5.13.1.6 DisableCortexMXPSRAutoCorrectTBit Usually, the J-Link DLL auto-corrects the T-bit of the XPSR register to 1, for Cortex-M devices. This is because having it set as 0 is an invalid state and would cause several problems during debugging, especially on devices where the erased state of the flash is 0x00 and therefore on empty devices the T-bit in the XPSR would be 0.
Page 184 This command is used to disable the flash download information window for the flash down- load feature. Enabled by default. Syntax DisableInfoWinFlashDL 5.13.1.11 DisableMOEHandling The J-Link DLL outputs additional information about mode of entry (MOE) in case the target CPU halted / entered debug mode. Disabled by default. Syntax DisableMOEHandling 5.13.1.12 DisablePowerSupplyOnClose This command is used to ensure that the power supply for the target will be disabled on close.
Page 185 EnableInfoWinFlashDL 5.13.1.19 EnableMOEHandling The J-Link DLL outputs additional information about mode of entry (MOE) in case the target CPU halted / entered debug mode. Disabled by default. Additional information is output via log-callback set with JLINK_OpenEx(JLINK_LOG* pfLog, JLINK_LOG* pfErrorOut) Syntax EnableMOEHandling 5.13.1.20...
Page 186 To avoid stalling the debug session, a critical memory area can be excluded from access: J-Link will not try to read or write to critical memory areas and instead ignore the access silently. Some debuggers (such as IAR C-SPY) can try to access memory in such areas by dereferencing non-initialized pointers even if the debugged program (the debuggee) is working perfectly.
Page 187 0x00080000-0x3FFFFFFF Reserved 0x40008000-0x7FCFFFFF Reserved 0x7FD02000-0x7FD02000 Reserved 0x80000000-0xDFFFFFFF To exclude these areas from being accessed through J-Link the map exclude command should be used as follows: map exclude 0x00080000-0x3FFFFFFF map exclude 0x40008000-0x7FCFFFFF map exclude 0x7FD02000-0x7FD02000 map exclude 0x80000000-0xDFFFFFFF 5.13.1.27 map illegal This command marks a specified memory region as an illegal memory area.
Page 188 Alias (static, e.g. RAM/flash that is aliased multiple times in one area. Does not change during the debug session.) Alias (dynamic, e.g. memory areas where different memories can be mapped to.) J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 189 5.13.1.32 ProjectFile This command is used to specify a file used by the J-Link DLL to save the current config- uration. Using this command is recommended if settings need to be saved. This is typically the case if Flash breakpoints are enabled and used. It is recommended that an IDE uses this command to allow the JLinkARM.dll to store its settings in the same directory as the project...
Page 190 5.13.1.34 ScriptFile This command is used to set the path to a J-Link script file which shall be executed. J-Link scriptfiles are mainly used to connect to targets which need a special connection sequence before communication with the core is possible.
Page 191 SetAllowSimulation 1 // Enables instruction set simulation 5.13.1.38 SetBatchMode This command is used to tell the J-Link DLL that it is used in batch-mode / automatized mode, so some dialogs etc. will automatically close after a given timeout. Disabled by default.
Page 192 The IDCODE stream is expected as a hex-encoded byte stream. If the CPU e.g. works on a word-basis for the IDCODE, this stream is interpreted as a little endian formatted stream where the J-Link library then loads the words from and passes them to the device during connect.
Page 193 5.13.1.46 SetFlashDLNoRMWThreshold This command sets the J-Link DLL internal threshold when a write to flash memory does not cause a read-modify-write (RMW) operation. For example, when setting this value to 0x800, all writes of amounts of data < 2 KB will cause the DLL to perform a read-modify-write operation on incomplete sectors.
Page 194 This can be useful to compensate certain delays on the target hardware (e.g. caused by routing etc.). Syntax TraceSampleAdjust <PinName> = <Adjust_Ps>[ <PinName#<Adjust_Ps> …] <PinName> Description Adjust all trace data signals Adjust trace data 0 Adjust trace data 1 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 195 5.13.1.53 SetResetType This command selects the reset strategy which shall be used by J-Link, to reset the device. The value which is used for this command is analog to the reset type which shall be selected. For a list of all reset types which are available, please refer to Reset strategies . Please note that there different reset strategies for ARM 7/9 and Cortex-M devices.
Page 196 Example SetRTTTelnetPort 9100 5.13.1.57 SetRTTSearchRanges In some cases J-Link cannot locate the RTT buffer in known RAM. This command is used to set (multiple) ranges to be searched for the RTT buffer. Syntax SetRTTSearchRanges <RangeAddr> <RangeSize> [, <RangeAddr1> <RangeSize1>, ..]...
Page 197 5.13.1.60 SetSysPowerDownOnIdle When using this command, the target CPU is powered-down when no transmission between J-Link and the target CPU was performed for a specific time. When the next command is given, the CPU is powered-up. Note This command works only for Cortex-M3 devices.
Page 198 Description All sectors using checksum Example SetVerifyDownload = 1 // Select programmed sectors, fastest method 5.13.1.62 SetWorkRAM This command can be used to configure the RAM area which will be used by J-Link. Syntax SetWorkRAM <StartAddressOfArea>-<EndAddressOfArea> Example SetWorkRAM 0x10000000-0x100FFFFF 5.13.1.63 ShowControlPanel Executing this command opens the control panel.
Page 199: Using Command Strings
Leave everything as it is, do not add any characters. Example SWOSetConversionMode = 0 5.13.2 Using command strings For instructions on how to execute J-Link script files depending on the debug environment used, please refer to: SEGGER Wiki: Getting Started with Various IDEs 5.13.2.1 In J-Link commander The J-Link command strings can be tested with the J-Link Commander.
Page 200 CHAPTER 5 Command strings Example exec SupplyPower = 1 exec map reset exec map exclude 0x10000000-0x3FFFFFFF J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 201: Switching Off Cpu Clock During Debug
CPU clock is periodically (typically using a regular timer interrupt) switched on every few ms for at least a few us. In this case, the CPU will stop at the first instruction in the ISR (typically at address 0x18). J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 202: Cache Handling
5.15.4 Cache handling of ARM9 cores ARM9 cores with cache require J-Link / J-Trace to handle the caches during debug. If the processor enters debug state with caches enabled, J-Link / J-Trace does the following: When entering debug state J-Link / J-Trace performs the following: •...
Page 203: Virtual Com Port (Vcom)
J-Link Commander and J-Link Configurator. Below, a small description of how to use use them to configure the feature is given. Note VCOM can only be used when debugging via SWD target interface. Pin 5 = J-Link-Tx (out), Pin 17 = J-Link-Rx (in). Note Currently, only J-Link models with hardware version 9 or newer comes with VCOM capabilities.
Page 204 CHAPTER 5 Virtual COM Port (VCOM) J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 205: Flash Download
Chapter 6 Flash download This chapter describes how the flash download feature of the DLL can be used in different debugger environments. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 206: Introduction
Introduction Introduction The J-Link DLL comes with a lot of flash loaders that allow direct programming of internal flash memory for popular microcontrollers. Moreover, the J-Link DLL also allows program- ming of CFI-compliant external NOR flash memory. The flash download feature of the J- Link DLL does not require an extra license and can be used free of charge.
Page 207: Licensing
CHAPTER 6 Licensing Licensing No extra license required. The flash download feature can be used free of charge. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 208: Supported Devices
CHAPTER 6 Supported devices Supported devices J-Link supports download into the internal flash of a large number of microcontrollers. You can always find the latest list of supported devices on our website: List of supported target devices In general, J-Link can be used with any ARM7/ARM9/ARM11, Cortex-M0/M1/M3/M4/M7/ M23/M33, Cortex-A5/A7/A8/A9/A12/A15/A17 and Cortex-R4/R5 core even if it does not provide internal flash.
Page 209: Setup For Various Debuggers (Internal Flash)
A few debuggers come with their own flashloaders and need to be configured to use the J- Link flashloader in order to achieve the maximum possible performance. For further information on how to specify the target device and on how to use the J-Link flashloader in different debuggers, please refer to:...
Page 210: Setup For Various Debuggers (Cfi Flash)
Specifying of the CFI area is done in a J-Link script file, as explained below. For further information on J-Link script files, please refer to J-Link Script Files and for further information on how to use J-Link script files with different debuggers, please refer to:...
Page 211: Setup For Various Debuggers (Spifi Flash)
Setup for various debuggers (SPIFI flash) Setup for various debuggers (SPIFI flash) The J-Link DLL supports programming of SPIFI flash and the J-Link flash download feature can be used therefore by different debuggers, such as IAR Embedded Work bench, Keil MDK, GDB based IDEs, …...
Page 212: Qspi Flash Support
QSPI flash support QSPI flash support The J-Link DLL also supports programming of any (Q)SPI flash connected to a device that is supported by the J-Link DLL, if the device allows memory-mapped access to the flash. Most modern MCUs / CPUs provide a so called “QSPI area” in their memory-map which allows the CPU to read-access a (Q)SPI flash as regular memory (RAM, internal flash etc.).
Page 213: Using The Dll Flash Loaders In Custom Applications
Using the DLL flash loaders in custom applications The J-Link DLL flash loaders make flash behave as RAM from a user perspective, since flash programming is triggered by simply calling the J-Link API functions for memory reading / writing. For more information about how to setup the J-Link API for flash programming...
Page 214: Debugging Applications That Change Flash Contents At Runtime
Debugging applications that change flash contents at runtime The J-Link DLL cashes flash contents in order to improve overall performance and therefore provide the best debugging experience possible. In case the debugged application does change the flash contents, it is necessary to disable caching of the effected flash range.
Page 215: Flash Breakpoints
Chapter 7 Flash breakpoints This chapter describes how the flash breakpoints feature of the DLL can be used in different debugger environments. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 216: Introduction
Introduction Introduction The J-Link DLL supports a feature called flash breakpoints which allows the user to set an unlimited number of breakpoints in flash memory rather than only being able to use the hardware breakpoints of the device. Usually when using hardware breakpoints only, a maximum of 2 (ARM 7/9/11) to 8 (Cortex-A/R) breakpoints can be set.
Page 217: Licensing
Link. For some devices J-Link comes with a device-based license and some J-Link models also come with a full license for flash breakpoints but the normal J-Link comes without any licenses. For more information about licensing itself and which devices have a device-based...
Page 218: Supported Devices
CHAPTER 7 Supported devices Supported devices J-Link supports flash breakpoints for a large number of microcontrollers. You can always find the latest list of supported devices on our website: List of supported target devices In general, J-Link can be used with any ARM7/ARM9/ARM11, Cortex-M0/M1/M3/M4/M7/ M23/M33, Cortex-A5/A7/A8/A9/A12/A15/A17 and Cortex-R4/R5 core even if it does not provide internal flash.
Page 219: Setup & Compatibility With Various Debuggers
J-Link control panel: 7.4.2 Compatibility with various debuggers Flash breakpoints can be used in all debugger which use the proper J-Link API to set break- points. Compatible debuggers/ debug interfaces are: •...
Page 220: Flash Breakpoints In Qspi Flash
QSPI flash. 7.5.1 Setup The setup for the debugger is the same as for downloading into QSPI flash. For more information please refer to QSPI flash support . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 221: Faq
Why can flash breakpoints not be used with Rowley Crossworks? Because Rowley Cross- works does not use the proper J-Link API to set breakpoints. Instead of using the break- point-API, Crossworks programs the debug hardware directly, leaving J-Link no choice to use its flash breakpoints.
Page 222: Monitor Mode Debugging
Chapter 8 Monitor Mode Debugging This chapter describes how to use monitor mode debugging support with J-Link. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 223: Introduction
1. Halt mode 2. Monitor mode Halt mode is the default debug mode used by J-Link. In this mode the CPU is halted and stops program execution when a breakpoint is hit or the debugger issues a halt request. This means that no parts of the application continue running while the CPU is halted (in debug mode) and peripheral interrupts can only become pending but not taken as this would require execution of the debug interrupt handlers.
Page 224: Enable Monitor Debugging
Enable Monitor Debugging Enable Monitor Debugging As explained before, by default J-Link uses halt mode debugging. In order to enable mon- itor mode debugging, the J-Link software needs to be explicitly told to use monitor mode debugging. This is done slightly differently from IDE to IDE. In general, the IDE does not notice any difference between halting and monitor debug mode.
Page 225: Availability And Limitations Of Monitor Mode
This restriction may be removed in a future version. It is not possible to debug the monitor itself, when using monitor mode. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 226: Monitor Code
A CPU core-specific monitor code is necessary to perform monitor mode debugging with J- Link. This monitor performs the communication with J-Link while the CPU is in debug mode (meaning in the monitor exception). The monitor code needs to be compiled and linked as a normal part of the application.
Page 227: Debugging Interrupts
Setting breakpoints in interrupt service routines (ISRs) with higher priority than the debug/monitor interrupt will result in malfunction because the CPU cannot take the debug interrupt when hitting the breakpoint. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 228: Having Servicing Interrupts In Debug Mode
Please keep in mind that there are some limitations for such interrupts: • They cannot be debugged • No breakpoints must be set in any code used by these interrupts J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 229: Forwarding Of Monitor Interrupts
ISRs from the user application vector table. For such cases, it is impossible for J-Link to automatically check for the existence of a monitor mode handler as the handler is usually linked in the user application and not in the additional software layer, so the DLL will automatically switch back to halt mode debugging.
Page 230: Target Application Performs Reset (Cortex-M)
However, there is a small window in which it can happen that a breakpoint is hit before J-Link has restored the monitor bits. If this happens, instead of entering debug mode, a HardFault is triggered. To avoid hanging of the application, a special version of the Hard- Fault_Handler is needed which detects if the reason for the HardFault was a breakpoint and if so, just ignores it and resumes execution of the target application.
Page 231: Low Power Debugging
Chapter 9 Low Power Debugging This chapter describes how to debug low power modes on a supported target CPU. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 232: Introduction
“check if CPU is halted/hit a BP”. To avoid this, there is a special setting for J-Link that can be activated, to handle such cases in a better way, which is explained in the following.
Page 233: Activating Low Power Mode Handling For J-Link
While usually the J-Link DLL handles communication losses as errors, there is a possibili- ty to enable low power mode handling in the J-Link DLL, which puts the DLL into a less restrictive mode (low-power handling mode) when it comes to such loss-cases. The low-...
Page 234: Restrictions
J-Link does it’s best to handle cases where one or more of the above restrictions is not considered but depending on how the IDE reacts to specific operations to fail, error mes- sages may appear or the debug session will be terminated by the IDE.
Page 235: Open Flashloader
Chapter 10 Open Flashloader This chapter describes how to add support for new devices to the J-Link DLL and software that uses the J-Link DLL using the Open Flashloader concept. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 236: Introduction
SEGGER and a new release of the J-Link soft- ware package being available. The J-Link DLL allows customers to add support for new devices on their own. It is also possible to edit/extend existing devices of the device database by for example adding new flash banks (e.g.
Page 237: General Procedure
XML file. The DLL is looking for this file in the same directory where the J-Link settings file is located. The location of the settings file depends on the IDE / software being used. For more information about where the settings file is located for...
Page 238: Adding A New Device
CHAPTER 10 Adding a new device 10.3 Adding a new device In order to add support for a new device to the J-Link DLL, the following needs to be added to the JLinkDevices.xml : <Database> <Device> <ChipInfo Vendor="..." Name="..." WorkRAMAddr="..."...
Page 239: Editing/Extending An Existing Device
CHAPTER 10 Editing/Extending an Existing Device 10.4 Editing/Extending an Existing Device In order to edit/extend a device that is already in the built-in device database of the J-Link DLL, the following needs to be added to the JLinkDevices.xml : <Database> <Device>...
Page 240: Xml Tags And Attributes
Name E.g. Name=“STM32F407IE” Hexadecimal value that specifies the address of a RAM area that can be used by J-Link during flash programming etc. Should not be used by any DMAs on the device. Cannot exist WorkRAMAddr without also specifying WorkRAMSize. If no flash banks are added for the new device, this attribute is optional.
Page 241 For a list of valid attribute values, please refer to Attribute values - Core . String that specifies the path to a J-Link script file if required for the device. Path can be relative or absolute. If path is JLinkScriptFile relative, is relative to the location of the JLinkDevices.xml...
Page 242: Flashbankinfo
10.5.4 <FlashBankInfo> Specifies a flash bank for the device. This allows to use the J-Link flash download func- tionality with IDEs, debuggers and other software that uses the J-Link DLL (e.g. J-Link Commander) for this device. The flash bank can then be programmed via the normal flash download functionality of the J-Link DLL.
Page 243 XML Tags and Attributes Parameter Meaning Hexadecimal value that specifies the start address of the flash bank. The J-Link DLL uses this attribute together with MaxSize to determine which memory write accesses per- formed by the debugger, shall be redirected to the flash...
Page 244: Example Xml File
WorkRAMSize="0x4000" JLinkScriptFile="Vendor1/Device1.jlinkscript" Core="JLINK_CORE_CORTEX_M0" /> <FlashBankInfo Name="Int. Flash" BaseAddr="0x70000000" MaxSize="0x10000" Loader="Vendor1/Loader0.FLM" LoaderType="FLASH_ALGO_TYPE_OPEN" /> </Device> <Device> <ChipInfo Vendor="ST" Name="STM32F746NGH6" /> <FlashBankInfo Name="SPIFI Flash" BaseAddr="0x30000000" MaxSize="0x80000" Loader="ST/STM32F7xx_SPIFI.FLM" LoaderType="FLASH_ALGO_TYPE_OPEN" /> </Device> </Database> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 245: Add. Info / Considerations / Limitations
CMSIS Flash Algorithms Compatibility CMSIS flash algorithms are also supported by the Open Flashloader concept. Therefore, an existing *.FLM file can be simply referenced in a J-Link XML device description file. The LoaderType attribute needs to be set to FLASH_ALGO_TYPE_OPEN .
Page 246: J-Flash Spi
SPI flashes, without any additional hardware. Both, J-Flash SPI and J-Flash SPI CL are part of the J-Link Software and Documentation Package which is available free of charge. This chapter assumes that you already possess working knowledge of the J-Link device.
Page 247: Introduction
Flash SPI requires a J-Link or Flasher to interface to the hardware. It is able to program all kinds of SPI flashes, even if the CPU they are connected to, is not supported by J-Link / Flasher because J-Flash SPI communicates directly with the SPI flash bypassing all other components of the hardware.
Page 248: Features
J-Flash SPI requires a PC running one of the supported operating system (see above) with a free USB port dedicated to a J-Link. A network connection is required only if you want to use J-Flash SPI together with J-Link Remote Server.
Page 249: Licensing
The following chapter provides an overview of J-Flash SPI related licensing options. 11.2.1 Introduction A J-Link PLUS, ULTRA+, PRO or Flasher ARM/PRO is required to use J-Flash SPI. No addi- tional license is required / available. J-Link / J-Trace (UM08001)
Page 250: Getting Started
This chapter presents an introduction to J-Flash SPI. It provides an overview of the included sample projects and describes the menu structure of J-Flash SPI in detail. 11.3.1 Setup For J-Link setup procedure required in order to work with J-Flash SPI, please refer to chapter Setup on page 119. 11.3.1.1 What is included? Tons of defines.
Page 251: Menu Structure
Saves the data file that currently has focus using the name and Save data file as… location given. New Project Creates a new project using the default settings. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 252 Opens and/or sets the focus to the project window. Target menu elements Command Description Creates a connection through the J-Link using the configura- Connect tion options set in the Project settings… of the Options dropdown menu. Disconnects a current connection that has been made through Disconnect the J-Link.
Page 253 A entry of the list can be selected to move the focus to the re- open windows> spective window. Help menu elements Command Description Opens the J-Link Manual (UM08001) in the default .PDF applica- J-Link User Guide tion of the system. About… J-Flash SPI and company information. J-Link / J-Trace (UM08001)
Page 254: Settings
This dialog is used to choose the connection to J-Link. The J-Link can either be connected over USB or via TCP/IP to the host system. Refer to the J-Link Manual (UM08001) for more information regarding the operation of J-Link and J-Link Remote Server.
Page 255 Init steps and Exit steps which can be used to execute custom command sequences. Interface Speed Specifies the SPI communication speed J-Link uses to communicate with the SPI flash. Init and Exit steps Can be used to add custom command sequences like for example write protection register.
Page 256 CHAPTER 11 Settings J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 257 Sectors if not blank: Erases all sectors which are both, effected by the image to be programmed and not already blank. • Chip: Erase the entire chip independent of the content. Program Programs the data file. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 258: Global Settings
JTAG and USB. 11.4.2.2 Logging You may set some logging options to customize the log output of J-Flash SPI. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 259 Enable J-Link logfile If this option is checked, you can specify a file name for the J-Link logfile. The J-Link logfile differs from the log window output of J-Flash SPI. It does not log J-Flash SPI operations performed.
Page 260: Command Line Interface
(optional) parameters. Also, note that a parameter must follow immediately after the option, e.g. JFlashSPI.exe -openprjC:\Projects\Default.jflash . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 261 Saves the current project in the specified file. -verify Verifies the target memory. -usb<SN> Overrides connection settings to USB S/N. • -ip<xxx.xxx.xxx.xxx> Overrides connection settings to IP. • -ip<HostName> J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 262: Batch Processing
In order to program multiple targets in parallel using J-Flash SPI, the following is needed: • Multiple J-Flash SPI projects, each configured to connect to a specific J-Link / Flasher (emulator to connect to is selected by serial number). The easiest way is to setup the appropriate project once and then make multiple copies of this project.
Page 263 CHAPTER 11 Command Line Interface @ECHO OFF ECHO Open first project which is configured to connect to the first J-Link. ECHO Open data file, start auto processing and exit open JFlashSPI.exe -openprjC:\\Projects\\Project01.jflash -openC:\\Data\ \data.bin, 0x100000 -auto -exit IF ERRORLEVEL goto ERROR ECHO Open second project which is configured to connect to the second J-Link.
Page 264: Creating A New J-Flash Spi Project
1. Select File -> New Project to create a new project with default settings. 2. Open the Project Settings context menu. Select Options -> Project Settings to open the Project settings dialog and select the type of connection to J-Link. 3. Define the SPI communication speed. The default settings work without any problem for most targets, but to achieve the last quantum of performance, manual tuning may be necessary.
Page 265: Custom Command Sequences
Step #20 to Step#22: Set Write Enable Step #23 to Step#27: Program security register with values from Var buffer Step #28 to Step#32: Read back security register to verify successful programming J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 266: J-Flash Spi Command Line Version
Linux / MAC, as well. The project can be either created using the GUI version of J-Flash SPI or by editing the *.jflash project, manually. The expected format of the custom command sequences in the J-Flash project file is described below. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 267 Below is a small example excerpt from a J-Flash project, which shows a example sequence to erase sector 0 of the SPI flash using the 0xD8 command. Further examples can be found in the installation directory of the J-Link software and documentation package. [CPU] // Set write enable ExitStep0_Action = "Activate CS"...
Page 268 CHAPTER 11 Custom Command Sequences ExitStep6_Action = "Delay" ExitStep6_Comment = "Wait until sector has been erased" ExitStep6_Value0 = 0x00000080 ExitStep6_Value1 = 0x00000000 NumExitSteps = 7 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 269: Device Specifics
EraseSector command can be overridden by the user. When manually changing the SectorErase command in the Options -> Project settings… -> Flash tab, make sure that the parameter matches the command being used SectorSize J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 270: Target Systems
Which flash devices can be programmed? In general, all kinds of SPI flash can be programmed. Since all flash parameters are con- figurable, also flashes with non-standard command sets can be programmed. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 271: Performance
11.10.1 Performance values In direct programming mode (J-Link directly connects to the pins of the SPI flash), the programming speed is mainly limited by the SPI communication speed, the USB speed of J-Link (if a Full-Speed or Hi-Speed based J-Link is used) and the maximum programming speed of the flash itself.
Page 272: Background Information
11.11.1 SPI interface connection For direct SPI flash programming, J-Link needs to be wired to the SPI flash in a specific way. For more information about the pinout for the J-Link SPI target interface, please refer to the J-Link Manual (UM08001). The minimum pins that need to be connected, are: VTref, GND, SPI-CLK, MOSI, MISO.
Page 273: Support
J-Link could not measure the target (flash) reference voltage on pin 1 of its connector. Remedy: The target interface of J-Link works with level shifters to be as flexible as possible. There- fore, the reference I/O voltage the flash is working with also needs to be connected to pin 1 of the J-Link connector.
Page 274: Rdi
/ debug probe interface. It is defined only for cores that have the same CPU register set as ARM7 CPUs. This chapter describes how to use the RDI DLL which comes with the J-Link Software and Documentation Package. The J-Link RDI DLL allows the user to use J- Link with any RDI-compliant debugger and IDE.
Page 275: Introduction
J-Link RDI mainly consists of a DLL designed for ARM cores to be used with any RDI compliant debugger. The J-Link DLL feature flash download and flash breakpoints can also be used with J-Link RDI.
Page 276: Licensing
12.2 Licensing In order to use the J-Link RDI software a separate license is necessary for each J-Link. For some devices J-Link comes with a device-based license and some J-Link models also come with a full license for J-Link RDI. The normal J-Link however, comes without any licenses.
Page 277: Setup For Various Debuggers
SEGGER Wiki: Getting Started with Various IDEs for information on how to get started with any IDE officially supported by J-Link / J-Trace. If official support is not implemented natively but via RDI, the RDI setup procedure will also be explained there.
Page 278 3. Now J-Link RDI is available in the Target Environments list. 4. Select J-Link and press OK to connect to the target via J-Link. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 287. After...
Page 279: Arm Rvds (Realview Developer Suite)
ARM RVDS (RealView developer suite) Software version J-Link RDI has been tested with ARM RVDS version 2.1 and 3.0. There should be no prob- lems with earlier versions of RVDS (up to version v3.0.1). All screenshots are taken from ARM’s RVDS version 2.1.
Page 280 2. Select File | Connection | Connect to Target. 3. In the Connection Control dialog use the right mouse click on the first item and select Add/Remove/Edit Devices. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 281 OK, Short Name: JLinkRDI Description: J-Link RDI Interface. 6. Back in the RDI Target List Dialog, select JLink-RDI and click Configure. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 287.
Page 282 7. Click the OK button in the configuration dialog. Now close the RDI Target List dialog. Make sure your target hardware is already connected to J-Link. 8. In the Connection control dialog, expand the JLink ARM RDI Interface and select the ARM_0 processor.
Page 283 CHAPTER 12 Setup for various debuggers 10. A project or an image is needed for debugging. After downloading, J-Link is used to debug the target. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 284: Ghs Multi
12.3.3 GHS MULTI Software version J-Link RDI has been tested with GHS MULTI version 4.07. There should be no problems with other versions of GHS MULTI. All screenshots are taken from GHS MULTI version 4.07. Configuring to use J-Link RDI 1.
Page 285 Setup for various debuggers 5. Confirm the choices by clicking the Apply button after the Connect button. 6. The J-Link RDI Configuration dialog will open. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 287.
Page 286 CHAPTER 12 Setup for various debuggers J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 287: Configuration
CHAPTER 12 Configuration 12.4 Configuration This section describes the generic setup of J-Link RDI (same for all debuggers) using the J-Link RDI configuration dialog. 12.4.1 Configuration file JLinkRDI.ini All settings are stored in the file JLinkRDI.ini. This file is located in the same directory as JLinkRDI.dll.
Page 288: General Tab
General tab Connection to J-Link This setting allows the user to configure how the DLL should connect to the J-Link. Some J- Link models also come with an Ethernet interface which allows to use an emulator remotely via TCP/IP connection.
Page 289 Init tab Macro file A macro file can be specified to load custom settings to configure J-Link RDI with advanced commands for special chips or operations. For example, a macro file can be used to initialize a target to use the PLL before the target application is downloaded, in order to speed up the download.
Page 290 * Purpose: Setup for Philips LPC2294 chip ********************************************************************** SetJTAGSpeed(1000); Reset(0); Write32(0xE01FC040, 0x00000001); // Map User Flash into Vector area at (0-3f) Write32(0xFFE00000, 0x20003CE3); // Setup CS0 Write32(0xE002C014, 0x0E6001E4); // Setup PINSEL2 Register SetJTAGSpeed(2000); J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 291 This may be needed if there are more devices located on the target system than the ARM chip you want to access or if more than one target system is connected to one J-Link at once. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 292 Furthermore it is necessary for some chips to enter the correct CPU clock frequen- Cache flash contents If enabled, the flash content is cached by the J-Link RDI software to avoid reading data twice and to speed up the transfer between debugger and target.
Page 293 An info window can be displayed while flash breakpoints are used showing the current operation. Depending on your JTAG speed the info window may hardly to be seen. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 294 12.4.4.7 Log tab A log file can be generated for the J-Link DLL and for the J-Link RDI DLL. This log files may be useful for debugging and evaluating. They may help you to solve a problem yourself, but is also needed by customer support help you.
Page 295 060:278 (0000) ARM_SetEndian(ARM_ENDIAN_LITTLE) 060:278 (0000) ARM_SetEndian(ARM_ENDIAN_LITTLE) 060:278 (0000) ARM_ResetPullsRESET(OFF) 060:278 (0009) ARM_Reset(): - Writing 0x54 bytes @ 0x00000178 >3E68> 060:287 (0001) ARM_Halt(): **** Warning: Chip has already been halted. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 296: Semihosting
J-Link RDI, please refer to Enabling Semihosting in J-Link RDI + AXD . 12.5.1 Unexpected / unhandled SWIs When an unhandled SWI is detected by J-Link RDI, the message box below is shown. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 297: Rtt
Chapter 13 SEGGER’s Real Time Terminal (RTT) is a technology for interactive user I/O in embedded ap- plications. It combines the advantages of SWO and semihosting at very high performance. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 298: Introduction
The default implementation uses one channel per direction, which are meant for printable terminal input and output. With the J-Link RTT Viewer this channel can be used for multiple “virtual” terminals, allowing to print to multiple windows (e.g. one for standard output, one for error output, one for debugging output) with just one target buffer.
Page 299: How Rtt Works
When RTT is active on the host computer, either by using RTT directly via an application like RTT Viewer or by connecting via Telnet to an application which is using J-Link, like a debugger, J-Link automatically searches for the SEGGER RTT Control Block in the target’s known RAM regions.
Page 300: Requirements
13.2.4 Requirements SEGGER RTT does not need any additional pin or hardware, despite a J-Link connected via the standard debug port to the target. It does not require any configuration of the target or in the debugging environment and can even be used with varying target speeds.
Page 301: Rtt Communication
The application is part of the J-Link Software and Documentation Pack for Windows, Linux and OS X. The source of J-Link RTT Logger can be used as a starting point to integrate RTT in other PC applications, like debuggers, and is part of the J-Link SDK.
Page 302: Implementation
13.4 Implementation The SEGGER RTT implementation code is written in ANSI C and can be integrated into any embedded application by simply adding the available sources. RTT can be used via a simple and easy to use API. It is even possible to override the standard printf() functions to be used with RTT.
Page 303 Once a channel is configured only the flags of the channel should be changed. 13.4.1.3 SEGGER_RTT_GetKey() Reads one character from SEGGER RTT buffer 0. Host has previously stored data there. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 304 Example c = SEGGER_RTT_GetKey(); (c == 'q') { exit(); 13.4.1.4 SEGGER_RTT_HasKey() Checks if at least one character for reading is available in SEGGER RTT buffer. Syntax int SEGGER_RTT_HasKey (void); Return value Value Meaning At least one character is available in the buffer.
Page 305 Error. Example SEGGER_RTT_printf(0, "SEGGER RTT Sample. Uptime: %.10dms.", /*OS_Time*/ 890912); // Formatted output on channel 0: SEGGER RTT Sample. Uptime: 890912ms. Additional information (1) Conversion specifications have following syntax: • %[flags][FieldWidth][.Precision]ConversionSpecifier (2) Supported flags: • -: Left justify within the field width •...
Page 306 "ERROR: Buffer overflow."); Additional information SEGGER_RTT_TerminalOut does not affect following data which is sent via channel 0. 13.4.1.10 SEGGER_RTT_Write() Send data to the host on an RTT channel. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 307 With SEGGER_RTT_Write() all kinds of data, not only printable one can be sent. 13.4.1.11 SEGGER_RTT_WaitKey() Waits until at least one character is available in SEGGER RTT buffer 0. Once a character is available, it is read and returned. Syntax int SEGGER_RTT_WaitKey (void);...
Page 308: Configuration Defines
Note SEGGER_RTT_TerminalOut ensures that implicit terminal switching commands are al- ways sent out, even while using the non-blocking modes. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 309 • BLUE • MAGENTA • CYAN • WHITE (light grey) • BRIGHT_BLACK (dark grey) • BRIGHT_RED • BRIGHT_GREEN • BRIGHT_YELLOW • BRIGHT_BLUE • BRIGHT_MAGENTA • BRIGHT_CYAN • BRIGHT_WHITE J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 310: Arm Cortex - Background Memory Access
AP which is the AHB-AP that shall be used for RTT background memory access, needs to be manually specified. This is done via the following J-Link Command string: CORESIGHT_SetIndexAHBAPToUse . For more information about how to use J-Link command strings in various environments, please refer to Using command strings . J-Link / J-Trace (UM08001)
Page 311: Example Code
13.6 Example code /********************************************************************* SEGGER MICROCONTROLLER GmbH & Co KG Solutions for real time microcontroller applications ********************************************************************** (c) 2014-2017 SEGGER Microcontroller GmbH & Co KG www.segger.com Support: support@segger.com ********************************************************************** ---------------------------------------------------------------------- File : RTT.c Purpose : Simple implementation for output via RTT.
Page 312: Faq
Q: I do not see any output, although the use of RTT in my application is correct. What can I do? A: In some cases J-Link cannot locate the RTT buffer in the known RAM region. In this case the possible region or the exact address can be set manually via a J-Link exec command: •...
Page 313: Trace
Chapter 14 Trace This chapter provides information about tracing in general as well as information about how to use SEGGER J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 314: Introduction
With this information it is possible to detect code which has not been covered by tests or may even be unreachable. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 315: What Is Code Profiling
The code profiling information can help to easier optimize a system, as it accurately shows which blocks take the most time and are worth optimizing. Note This feature also requires a J-Trace that supports streaming trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 316: Tracing Via Trace Pins
(e.g. ARM that provides the ETM as a trace component for their cores). For more information about what timings need to be met for a specific J-Trace model, please refer to J-Link / J-Trace models . 14.2.3...
Page 317: J-Trace Models With Support For Streaming Trace
J-Trace models with support for streaming trace For an overview which J-Trace models support streaming trace, please refer to SEGGER Wiki: J-Link / J-Trace / Flasher Software and Hardware features overview J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 318: Tracing With On-Chip Trace Buffer
This allows to also do trace on such targets with a regular J-Link, as the on-chip trace buffer can be read out via the regular debug interface J-Link uses to communicate with the target CPU.
Page 319: Target Devices With Trace Support
Target devices with trace support For an overview for which target devices trace is supported (either via pins or via on-chip trace buffer), please refer to List of supported target devices J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 320: Streaming Trace
(would lead to a too big performance drop), a copy of the application contents is cached in the J-Link software at the time the application download is performed. This implies that streaming trace is only possible with prior download of the application in the same debug session.
Page 321: Target Interfaces And Adapters
Chapter 15 Target interfaces and adapters This chapter gives an overview about J-Link / J-Trace specific hardware details, such as the pinouts and available adapters. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 322: 20-Pin J-Link Connector
IDC sockets mounted on a ribbon cable. *On later J-Link products like the J-link ULTRA, these pins are reserved for firmware exten- sion purposes. They can be left open or connected to GND in normal debug environment.
Page 323 CHAPTER 15 20-pin J-Link connector Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. 15.1.1.1 Target board design We strongly advise following the recommendations given by the chip manufacturer. These recommendations are normally in line with the recommendations given in the table Pinout for JTAG on page 322.
Page 324: Pinout For Swd
Target power supply . Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system.
Page 325: Pinout For Swd + Virtual Com Port (Vcom)
15.1.3 Pinout for SWD + Virtual COM Port (VCOM) The J-Link and J-Trace JTAG connector is also compatible to ARM’s Serial Wire Debug (SWD). *On later J-Link products like the J-link ULTRA, these pins are reserved for firmware exten- sion purposes. They can be left open or connected to GND in normal debug environment.
Page 326: Pinout For Spi
15.1.4 Pinout for SPI *On later J-Link products like the J-link ULTRA, these pins are reserved for firmware exten- sion purposes. They can be left open or connected to GND in normal debug environment. The following table lists the pinout for the SPI interface on J-Link.
Page 327 Older J-Links may not be able to supply power on this pin. For 5V-Supply Output more information about how to enable/disable the power sup- ply, please refer to Target power supply . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 328: 19-Pin Jtag/Swd And Trace Connector
Output nected to TDI of the target CPU. For CPUs which do not pro- vide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD. Not connected inside J-Link. Leave open on target hardware.
Page 329 CHAPTER 15 19-pin JTAG/SWD and Trace connector against overload and short-circuit. Power can be controlled via the J-Link commander. The following commands are available to control power: Command Explanation Switch target power on power on Switch target power off power off perm Set target power supply default to “on”...
Page 330: 9-Pin Jtag/Swd Connector
Output ly connected to TDI of the target CPU. For CPUs which do not provide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD. By default, TRST is not connected, but the Cortex-M Adapter...
Page 331: Reference Voltage (Vtref)
15.4 Reference voltage (VTref) VTref is the target reference voltage. It is used by the J-Link to check if the target has power, to create the logic-level reference for the input comparators and to control the output logic levels to the target. It is normally fed from Vdd of the target board and must not have a series resistor.
Page 332: Adapters
CHAPTER 15 Adapters 15.5 Adapters There are various adapters available for J-Link as for example the JTAG isolator, the J-Link RX adapter or the J-Link Cortex-M adapter. For more information about the different adapters, please refer to J-Link adapters J-Link / J-Trace (UM08001)
Page 333: Background Information
Reduced Instruction Set Computer (RISC) principles. The instruc- tion set and the related decode mechanism are greatly simplified compared with micropro- grammed Complex Instruction Set Computer (CISC). J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 334: Jtag
No matter in which state the TAP controller currently is, it can change into Reset state if TMS is high for at least 5 clock cycles. As long as TMS is high, the TAP controller remains in Reset state. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 335 Temporary controller state. Pause-IR Wait state that temporarily halts the instruction shifting. Exit2-IR Temporary controller state. Allows to either go back into Shift-IR state or go on to Up- date-IR. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 336 Once latched, this new instruction becomes the current one. The parallel latch prevents changes at the parallel output of the instruction register from occurring during the shifting process. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 337: Embedded Trace Macrocell (Etm)
In the following a sample integration of J-Trace and the trace functionality on the debugger side is shown. The sample is based on IAR’s Embedded Workbench for ARM integration of J-Trace. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 338 CHAPTER 16 Embedded Trace Macrocell (ETM) 16.2.3.1 Code coverage - Disassembly tracing J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 339 CHAPTER 16 Embedded Trace Macrocell (ETM) 16.2.3.2 Code coverage - Source code tracing J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 340 CHAPTER 16 Embedded Trace Macrocell (ETM) J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 341: Embedded Trace Buffer (Etb)
No additional special trace port is required, so that the ETB can be read via J-Link. The trace functionality via J-Link is limited by the size of the ETB. While capturing runs, the trace information in the buffer will be overwritten every time the buffer size has been reached.
Page 342: Flash Programming
In this case, the RAM code is started as described above before downloading any data. The RAM code then communicates with the host computer (via DCC, JTAG and J-Link / J- Trace), transferring data to the target. The RAM code then programs the data into flash and waits for new data from the host.
Page 343 Implement your own flash loader using the functionality of the JLinkARM.dll as described above. This can be a time consuming process and requires in-depth knowledge of the flash programming algorithm used as well as of the target system. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 344: J-Link / J-Trace Firmware
Every time you connect to J-Link / J-Trace, JLinkARM.dll checks if its embedded firmware is newer than the one used the J-Link / J-Trace. The DLL will then update the firmware automatically. This process takes less than 3 seconds and does not require a reboot.
Page 345 CHAPTER 16 J-Link / J-Trace firmware In the screenshot: • “Updating firmware” identifies the new firmware. • “Replacing firmware” identifies the old firmware which has been replaced. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 346: Designing The Target Board For Trace
Chapter 17 Designing the target board for trace This chapter describes the hardware requirements which have to be met by the target board. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 347: Overview Of High-Speed Board Design
Termination is almost certainly necessary, but there are some circumstances where it is not required. The decision is related to track length between the ASIC and the JTAG+Trace connector, see Terminating the trace signal on page 348 for further reference. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 348: Terminating The Trace Signal
Care must be taken not to connect devices in this way, unless the distortion does not affect device operation. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 349: Signal Requirements
The table below lists the specifications that apply to the signals as seen at the JTAG+Trace connector. Signal Value Fmax 200MHz Ts setup time (min.) 2.0ns Th hold time (min.) 1.0ns TRACECLK high pulse width (min.) 1.5ns TRACECLK high pulse width (min.) 1.5ns J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 350: Semihosting
Chapter 18 Semihosting J-Link supports semihosting for ARM targets. This chapter explains what semihosting is, what it can be used for and how to enable semihosting in different environments. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 351: Introduction
Semihosting handling is natively supported by many debuggers/IDEs, for example GDB. 18.1.2 Disadvantages • Target CPU is halted on each semihosting command, debugger evaluates the semihosting command and restarts the CPU. This affects real-time behavior of the system. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 352: Debugger Support
• J-Link Debugger • J-Link GDBServer + GDB • SEGGER Embedded Studio • J-Link RDI (and therefor most RDI compliant debuggers) • IAR Embedded Workbench for ARM • Keil MDK-ARM • ARM AXD J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 353: Implementation
18.3.3 J-Link GDBServer optimized version When using J-Link GDBServer with a GDB-based environment, there is a third implemen- tation for semihosting available which is a hybrid of the other implementations, combining the advantages of both. With this implementation, an SVC instruction with the usual SVC reason is used to issue a semihosting call but the debugger does not set a breakpoint or vector catch on the start of the SVC exception handler.
Page 354 18.3.3.1 SVC exception handler sample code In the following, some sample code for the SVC handler, prepared to be used with J-Link GDBServer optimized semihosting, is given: SVC_Handler: ; For semihosting R0 and R1 contain the semihosting information and may not ;...
Page 355 CHAPTER 18 Implementation .byte 0x00 .byte 0x00 J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 356: Communication Protocol
ISO C fopen() modes for the numbers are listed. ISO C fopen() modes ISO C Word1 fopen() mode 1 rb 2 r+ 3 r+b J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 357: Command Sys_Close (0X02)
Register R1 holds a pointer to an address on the target, that specifies a 1-word (32-bit each) buffer where additional information for the command can be found. Word 0 Pointer to the character to the written. Return value None J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 358: Command Sys_Write0 (0X04)
Pointer to a buffer on the target where data from file is written to. Word 2 Number of bytes to read Return value Operation result is written to register R0 by the debugger. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 359: Command Sys_Readc (0X07)
Position of the filepointer inside the file, to set to. Return value Operation result is written to register R0 by the debugger. Value Meaning O.K. ≠ 0 Error J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 360: Command Sys_Flen (0X0C)
Pointer to a null-terminated string that specifies the new name of the file. Word 3 Length of the string (without terminating null-character) pointed to by word 2 . J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 361: Command Sys_Get_Cmdline (0X15)
Register R1 is one of the following values: Exit code Meaning Application exited normally. 0x20026 Application exited with error. 0x20023 Return value None. J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 362: Enabling Semihosting In J-Link Gdbserver
CHAPTER 18 Enabling semihosting in J-Link GDBServer 18.5 Enabling semihosting in J-Link GDBServer By default, semihosting is disabled in J-Link GDBServer. Depending on the mechanism to be used, different setups are necessary 18.5.1 SVC variant The following commands need to be added to the gdbinit file that is executed at the start...
Page 363: Enabling Semihosting In J-Link Rdi + Axd
The S bit in $vector_catch has no effect unless semihosting is disabled. $semihosting_vector This variable controls the location of the breakpoint set by J-Link RDI to detect a semihosted SWI. It is set to the SWI entry in the exception vector table () by default.
Page 364: Support And Faqs
This chapter contains troubleshooting tips as well as solutions for common problems which might occur when using J-Link / J-Trace. There are several steps you can take before con- tacting support. Performing these steps can solve many problems and often eliminates the need for assistance.
Page 365: Measuring Download Speed
JLink.exe has been used for measurement performance. The hardware consisted of: • PC with 2.6 GHz Pentium 4, running Win2K • USB 2.0 port • USB 2.0 hub • J-Link • Target with ARM7 running at 50MHz J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG...
Page 366: Troubleshooting
Troubleshooting 19.2 Troubleshooting 19.2.1 General procedure If you experience problems with J-Link / J-Trace, you should follow the steps below to solve these problems: • Close all running applications on your host system. • Disconnect the J-Link / J-Trace device from USB.
Page 367: Contacting Support
PC and if possible with another target system to see if it works there. If the device functions correctly, the USB setup on the original machine or your target hardware is the source of the problem, not J-Link / J-Trace. If you need to contact support, send the following information to support@segger.com :...
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