Segger J-Link User Manual page 203

instruction of the user code is executed. Then the watchdog of the LPC1200 device is
disabled. This reset strategy is only guaranteed to work on "modern" J-Links (J-Link
V8, J-Link Pro, J-link ULTRA, J-Trace for Cortex-M, J-Link Lite) and if a SWD speed of
min. 1 MHz is used. This reset strategy should also work for J-Links with hardware
version 6, but it can not be guaranteed that these J-Links are always fast enough in
disabling the watchdog.
5.8.2.11 Type 10: Reset for Samsung S3FN60D devices
On the Samsung S3FN60D devices the watchdog may be running after reset (if the
watchdog is active after reset or not depends on content of the smart option bytes at
addr 0xC0). The watchdog keeps counting even if the CPU is in debug mode (e.g.
halted by a halt request or halted by vector catch). When using this reset strategy, J-
Link performs a reset of the CPU and peripherals, using the SYSRESETREQ bit and sets
VC_CORERESET in order to halt the CPU after reset, before it executes a single instruc-
tion. Then the watchdog of the S3FN60D device is disabled.
J-Link / J-Trace (UM08001) © 2004-2017 SEGGER Microcontroller GmbH & Co. KG
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