Page 1 J-Link / J-Trace User Guide Software Version V4.84 Manual Rev. 0 Date: March 21, 2014 Document: UM08001 A product of SEGGER Microcontroller GmbH & Co. KG www.segger.com...
Page 2 Please make sure your manual is the latest edition. While the information herein is assumed to be accurate, SEGGER Microcontroller GmbH & Co. KG (the manufacturer) assumes no responsibility for any errors or omissions. The manufacturer makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you.
Page 3 Added command line option parameter to specify a customized scan-chain. Chapter "Working with J-Link" * Section "Virtual COM Port (VCOM) added. Chapter "Setup" * Section "Getting started with J-Link and DS-5" Chapter "Related Software" V4.82 Rev. 0 140218 * Section "GDB Server"...
Page 4 130124 * Section "9-pin JTAG/SWD connector" Pinout description corrected. Chapter "Intoduction" V4.58 Rev. 1 121206 * Section "J-Link / J-Trace models" updated. Chapter "Working with J-Link" * Section "J-Link script files" V4.58 Rev. 0 121126 Sub-section "Executing J-Link script files"...
Page 5 V4.36 Rev. 0 110909 * Section "J-Link script files" updated. Chapter "Introduction" V4.26 Rev. 1 110513 * Section "J-Link / J-Trace models" corrected. V4.26 Rev. 0 110427 Several corrections. Chapter "Introduction" * Section "J-Link / J-Trace models" corrected. V4.24 Rev. 1 110228 Chapter "Device specifics"...
Page 6 * Section "J-Link / J-Trace models" updated. Chapter "Introduction" * Section" Specifications" updated * Section "Hardware versions" updated 090828 * Section "Common features of the J-Link product family" updated Chapter "Target interfaces and adapters" * Section "5 Volt adapter" updated Chapter "Introduction"...
Page 7 * Section "Target board design for JTAG" 090108 updated. * Section "Target board design for SWD" added. Chapter "Working with J-Link Pro" 090105 * Section "Connecting J-Link Pro the first time" updated. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 8 * Section "Connecting multiple J-Links / J-Traces to your PC" updated. 080910 Chapter "Licensing" updated. Chapter "Licensing" added. Chapter "Hardware" 080904 Section "J-Link OEM versions" moved to chapter "Licensing" Chapter "Hardware" Section "JTAG+Trace connector" JTAG+Trace 080902 connector pinout corrected. Section "J-Link OEM versions" updated.
Page 9 Chapter "J-Link and J-Trace related software" 080215 Section "J-Link software and documentation package in detail" updated. Chapter "J-Link and J-Trace related software" Section "J-Link TCP/IP Server (Remote J-Link / J-Trace use)" updated. Chapter "Working with J-Link and J-Trace" Section "Command strings" updated. 080212 Chapter "Flash download and flash breakpoints"...
Page 10 070312 "Differences between different versions" supplemented. Chapter "J-Link / J-Trace related software": 070307 "J-Link GDB Server" licensing updated. Chapter "J-Link / J-Trace related software" updated and reorganized. 070226 Chapter "Hardware" "List of OEM products" updated Chapter "Device specifics" added 070221 Subchapter "Command strings"...
Page 11 060117 Screenshots updated. 051208 Chapter Working with J-Link: Sketch added. Chapter Working with J-Link: "Connecting multiple J-Links to your PC" added. Chapter Working with J-Link: "Multi core debug- 051118 ging" added. Chapter Background information: "J-Link firm- ware" added. 051103 Chapter Setup: "JTAG Speed" added.
Page 13: About This Document
For simplicity, we will refer to J-Link ARM as J-Link in this manual. For simplicity, we will refer to J-link Pro as J-Link Pro in this manual. Typographic conventions This manual uses the following typographic conventions:...
Page 14 Apart from its main focus on software tools, SEGGER develops and produces programming tools for flash microcontrollers, as well as J-Link, a JTAG emulator to assist in develop- ment, debugging and production, which has rapidly become the industry standard debug probe for microcontrollers / microprocessors.
Page 15: Table Of Contents
Flash memory and ARM core. Flasher ARM is designed for programming flash targets with the J-Flash software or stand-alone. In addition to that Flasher ARM has all of the J-Link function- ality. Flasher ARM connects via USB or via RS232 interface to a PC, running Microsoft Windows 2000, Windows XP, Windows 2003 or Windows Vista.
Page 16 3.11.2 J-Link STM32 Unlock (Command line tool) ..........112 3.12 J-Link Software Developer Kit (SDK) ............114 4 Setup..........................115 Installing the J-Link software and documentation pack ........116 4.1.1 Setup procedure ..................116 Setting up the USB interface..............119 4.2.1 Verifying correct driver installation ............119 4.2.2...
Page 17 4.8.2 Using J-Link in DS-5 Development Studio ..........131 5 Working with J-Link and J-Trace..................133 Connecting the target system..............134 5.1.1 Power-on sequence................134 5.1.2 Verifying target device connection ............134 5.1.3 Problems ....................134 Indicators ..................... 135 5.2.1 Main indicator ..................135 5.2.2...
Page 18 8.4.4 Configuration dialog ................224 Semihosting ..................233 8.5.1 Overview ....................233 8.5.2 The SWI interface ..................233 8.5.3 Implementation of semihosting in J-Link RDI ..........234 8.5.4 Semihosting with AXD................234 8.5.5 Unexpected / unhandled SWIs ..............235 9 Device specifics ......................237 Analog Devices ..................238 9.1.1 ADuC7xxx .....................238...
Page 19 J-Trace integration example - IAR Embedded Workbench for ARM ....291 11.3 Embedded Trace Buffer (ETB) ..............295 11.4 Flash programming ................296 11.4.1 How does flash programming via J-Link / J-Trace work?......296 11.4.2 Data download to RAM ................296 11.4.3 Data download via DCC ................296 11.4.4 Available options for flash programming ...........
Page 20 Test environment ...................306 13.2 Troubleshooting ..................307 13.2.1 General procedure..................307 13.2.2 Typical problem scenarios ...............307 13.3 Contacting support .................309 13.4 Frequently Asked Questions..............310 14 Glossary........................311 15 Literature and references...................317 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 21: Introduction
Chapter 1 Introduction This chapter gives a short overview about J-Link and J-Trace. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 22: Requirements
Introduction Requirements Host System To use J-Link or J-Trace you need a host system running Windows 2000 or later. For a list of all operating systems which are supported by J-Link, please refer to Supported OS on page 23. Target System A target system with a supported CPU is required.
Page 23: Supported Os
Supported OS J-Link/J-Trace can be used on the following operating systems: • Microsoft Windows 2000 • Microsoft Windows XP • Microsoft Windows XP x64 • Microsoft Windows Vista • Microsoft Windows Vista x64 • Windows 7 • Windows 7 x64 •...
Page 24: J-Link / J-Trace Models
J-Links / J-Traces have the hardware version printed on the back label. If this is not the case with your J-Link / J-Trace, start JLink.exe. As part of the initial message, the hardware version is displayed.
Page 25: Model Comparison
A9/R4 JTAG ETM Trace Software features Software features are features implemented in the software primarily on the host. Software features can either come with the J-Link or be added later using a license string from Segger. J-Trace J-Link J-Link J-Link...
Page 26: J-Link
USB to a PC running Microsoft Windows 2000 or later. For a complete list of all operating systems which are supported, please refer to Supported OS on page 23. J-Link has a built-in 20-pin JTAG connector, which is compatible with the standard 20-pin connector defined by ARM.
Page 27 5V target supply (pin 19) of Kick-Start versions of J-Link is current monitored and limited. J-Link automatically switches off 5V supply in case of over-current to protect both J-Link and host computer. Peak current (<= 10 ms) limit is 1A, operating current limit is 300mA.
Page 28 Identical to version 9.1 with the following exception: • Pin 1 (VTref) is used for measuring target reference voltage only. Buffers on J- Link side are no longer powered through this pin but via the J-Link internal volt- age supplied via USB. J-Link / J-Trace (UM08001)
Page 29: J-Link Ultra
CPU core etc. 1.3.3.2 Specifications The following table gives an overview about the specifications (general, mechanical, electrical) for J-link ULTRA. All values are valid for J-link ULTRA hardware version 1. Note: Some specifications, especially speed, are likely to be improved in the future with newer versions of the J-Link software (freely available).
Page 30: J-Link Pro
Table 1.2: J-link ULTRA specifications 1.3.4 J-Link PRO J-Link PRO is a JTAG emulator designed for ARM cores. It is fully compatible to J-Link and connects via Ethernet/USB to a PC running Microsoft Windows 2000 or later, Linux or Mac OS X.
Page 31: J-Link Lite Arm
Identical to version 4 with the following exception: • Pin 1 (VTref) is used for measuring target reference voltage only. Buffers on J- Link side are no longer powered through this pin but via the J-Link internal volt- age supplied via USB. 1.3.5 J-Link Lite ARM J-Link Lite ARM is a fully functional OEM-version of J-Link.
Page 32: J-Link Lite Cortex-M
Table 1.3: J-Link Lite specifications 1.3.6 J-Link Lite Cortex-M J-Link Lite Cortex-M is a specific OEM-version of SEGGER J-Link Lite which is designed to be used with Cortex-M devices. If you are selling evaluation-boards, J-Link Lite CortexM is an inex- pensive emulator solution for you.
Page 33: J-Trace Arm
123mm x 68mm x 30mm Weight (without cables) 120g Mechanical USB Interface USB 2.0, full speed JTAG 20-pin (14-pin adapter available) Target Interface JTAG+Trace: Mictor, 38-pin Table 1.5: J-Trace specifications J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 34 CHAPTER 1 Introduction JTAG/SWD Interface, Electrical Power Supply USB powered < 300mA Supported Target interface voltage 3.0 - 3.6 V (5V adapter available) Table 1.5: J-Trace specifications J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 35 The actual speed depends on various factors, such as JTAG, clock speed, host CPU core etc. 1.3.7.4 Hardware versions Version 1 This J-Trace uses a 32-bit RISC CPU. Maximum download speed is approximately 420 KBytes/second (600 KBytes/second using DCC). J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 36: J-Trace For Cortex-M
J-Trace for Cortex-M is a JTAG/SWD emulator designed for Cor- tex-M cores which includes trace (ETM) support. J-Trace for Cortex-M can also be used as a J-Link and it also supports ARM7/9 cores. Tracing on ARM7/9 targets is not supported.
Page 37 Version 3.1 Identical to version 2.0 with the following exceptions: • Hi-Speed USB • Voltage range for trace signals extended to 1.2 - 3.3 V • Higher download speed J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 38: Flasher Arm
J-Flash soft- ware or stand-alone. In addition to that Flasher ARM has all of the J-Link functionality. For more information about Flasher ARM, please refer to UM08007, Flasher ARM User’s Guide. 1.3.9.1 Specifications The following table gives an overview about the specifications (general, mechanical, electrical) for Flasher ARM.
Page 39: J-Link Coldfire
10 kOhm Table 1.9: Flasher ARM specifications 1.3.10 J-Link ColdFire J-Link ColdFire is a BDM emulator designed for ColdFire® cores. It connects via USB to a PC running Microsoft Windows 2000, Windows XP, Windows 2003, or Windows Vista. J-Link ColdFire has a built-in 26-pin BDM connector, which is compatible to the standard 26-pin connector defined by Freescale.
Page 40: Common Features Of The J-Link Product Family
Memory viewer (J-Mem) included • Remote server included, which allows using J-Trace via TCP/IP networks • RDI interface available, which allows using J-Link with RDI compliant software • Flash programming software (J-Flash) available • Flash DLL available, which allows using flash functionality in custom applications •...
Page 41: Supported Cpu Cores
Supported CPU cores J-Link / J-Trace has been tested with the following cores, but should work with any ARM7/9/11, Cortex-M0/M1/M3/M4 and Cortex-A5/A8/A9/R4 core. If you experience problems with a particular core, do not hesitate to contact Segger. • ARM7TDMI (Rev 1) •...
Page 42: Built-In Intelligence For Supported Cpu-Cores
CPU-core. If Intelligence in the firmware is available, it is used. If you are using a J-Link that does not have intelligence in the firmware and only PC-side intelligence is available for the connected CPU, a warning message is shown.
Page 43 Instability, especially on slow targets Due to the fact that a lot of USB transactions would cause a very bad perfor- mance of J-Link, on PC-side implementations the assumption is made that the CPU/Debug interface is fast enough to handle the commands/requests without the need of waiting.
Page 44: Firmware Intelligence Per Model
1.6.3 Firmware intelligence per model There are different models of J-Link / J-Trace which have built-in intelligence for dif- ferent CPU-cores. In the following, we will give you an overview about which model of J-Link / J-Trace has intelligence for which CPU-core.
Page 45 1.6.3.2 Older models The table below lists the firmware CPU support for older J-Link & J-Trace models which are not sold anymore. Cortex- Renesas Cortex-M J-Link / J-Trace RX600 model JTAG JTAG JTAG JTAG JTAG not sup- J-Link " "...
Page 46: Supported Ides
J-Link / J-Trace can be used with different IDEs. Some IDEs support J-Link directly, for other ones additional software (such as J-Link RDI) is necessary in order to use J- Link. The following tables list which features of J-Link / J-Trace can be used with the different IDEs.
Page 47: Licensing
Chapter 2 Licensing This chapter describes the different license types of J-Link related software and the legal use of the J-Link software with original SEGGER and OEM products. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 48: Components Requiring A License48
CHAPTER 2 Licensing Components requiring a license The following programs/features require a full-featured J-Link (PLUS, ULTRA+, PRO, J-Trace) or an additional license for the J-Link base model: • J-Flash • J-Link RDI • Flash breakpoints (FlashBP) J-Link / J-Trace (UM08001)
Page 49: License Types
J-Link PLUS, J-Link ULTRA+ and J-Link Pro. Key-based license This type of license is used if you already have a J-Link, but order a license for a J- Link software component at a later time. In addition to that, the key-based license is used for trial licenses.
Page 50: Legal Use Of Segger J-Link Software
Use of software SEGGER J-Link software may only be used with original SEGGER products and autho- rized OEM products. The use of the licensed software to operate SEGGER product clones is prohibited and illegal.
Page 51: Original Segger Products
Original SEGGER products The following products are original SEGGER products for which the use of the J-Link software is allowed: 2.4.1 J-Link J-Link is a JTAG emulator designed for ARM cores. It connects via USB to a PC running Microsoft Windows 2000, Windows XP, Windows 2003, Windows Vista or Windows 7.
Page 52: J-Link Ultra
J-link ULTRA+ is a JTAG/SWD emulator designed for ARM/Cor- tex and other supported CPUs. It is fully compatible to the stan- dard J-Link and works with the same PC software. Based on the highly optimized and proven J-Link, it offers even higher speed as well as target power measurement capabilities due to the faster CPU, built-in FPGA and High speed USB interface.
Page 53: J-Trace
J-Trace for Cortex-M is a JTAG/SWD emulator designed for Cor- tex-M cores which include trace (ETM) support. J-Trace for Cor- tex-M can also be used as a regular J-Link and it also supports ARM7/9 cores. Please note that tracing on ARM7/9 targets is not supported by J-Trace for Cortex-M.
Page 54: Flasher Arm
Flash memory and ARM core. Flasher ARM is designed for programming flash targets with the J-Flash software or stand-alone. In addition to that Flasher ARM has all of the J-Link func- tionality. Flasher ARM connects via USB or via RS232 interface to a PC, running Microsoft Windows 2000, Windows XP, Windows 2003 or Windows Vista.
Page 55: Flasher Ppc
J-Flash soft- ware or stand-alone. In addition to that Flasher ARM has all of the J-Link functionality. Flasher ARM connects via USB or via RS232 interface to a PC, running Microsoft Windows 2000, Win- dows XP, Windows 2003 or Windows Vista.
Page 56: J-Link Oem Versions
In any case, it should be possible to use the J-Link software with these OEM versions. How- ever, proper function cannot be guaranteed for OEM versions. SEGGER Microcontrol- ler does not support OEM versions;...
Page 57: Digi: Jtag Link
Limitations Digi JTAG Link works with Digi devices only. This limitation can NOT be lifted; if you would like to use J-Link with a device from an other manufacturer, you need to buy a separate J-Link. Licenses License for GDB Server is included. Other licenses can be added.
Page 58: Iar: J-Trace
No licenses are included. All licenses can be added. Note J-Link Lite ARM is only delivered and supported as part of Starter Kits. It is not sold to end customer and not guaranteed to work with custom hardware. J-Link / J-Trace (UM08001)
Page 59: J-Link Obs
J-Link OBs J-Link OBs (J-Link On Board) are single chip versions of J-Link which are used on var- ious evalboards. It is legal to use J-Link software with these boards. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 60: Illegal Clones
The use of illegal J-Link clones with this software is a violation of US, European and other international laws and is prohibited. If you are in doubt if your unit may be legally used with SEGGER J-Link software, please get in touch with us.
Page 61: Link Software And Documentation Package
Chapter 3 J-Link software and documenta- tion package This chapter describes the contents of the J-Link software and documentation pack- age which can be downloaded from www.segger.com. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 62: Software Overview
Included are: STR9 Commander and STM32 Unlock. Table 3.1: J-Link / J-Trace related software a. Full-featured J-Link (PLUS, PRO, ULTRA+) or an additional license for J-Link base model required. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 63: J-Link Commander (Command Line Tool)
Selects a command file and starts J-Link Commander in batch mode. The batch mode of J-Link Commander is similar to the execution of a batch file. The command file is parsed line by line and one command is executed at a time.
Page 64: Using Command Files
3.2.2 Using command files J-Link commander can also be used in batch mode which allows the user to use J- Link commander for batch processing and without user interaction. Please do not confuse command file with J-Link script files (please refer to J-Link script files on page 163 for more information about J-Link script files).
Page 65 Example JLink.exe -CommanderScript C:\CommandFile.jlink Contents of CommandFile.jlink: exec device = STM32F103ZE loadbin C:\firmware.bin,0x08000000 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 66: J-Link Gdb Server
IDEs like emIDE or Eclipse. J-Link GDB Server is a remote server for GDB making it possible for GDB to connect to and communicate with the target device via J-Link. GDB Server and GDB commu- nicate via a TCP/IP connection, using the standard GDB remote protocol.
Page 67: Debugging With J-Link Gdb Server
3.3.2 Debugging with J-Link GDB Server With J-Link GDB Server programs can be debugged via GDB directly on the target device like a normal application. The application can be loaded into RAM or flash of the device. Before starting GDB Server make sure a J-Link and the target device are connected.
Page 68 Stay on top • Show log window • Generate logfile: If checked, a log file with the GDB <-> GDB Server <-> J-Link communication will be created. • Verify download: If checked, the memory on the target will be verified after download.
Page 69 GDB. Within GDB all GDB commands and the remote monitor commands are available. For more information about debugging with GDB refer to its online manual available at http://sourceware.org/gdb/current/onlinedocs/gdb/. A typical startup of a debugging session can be like: J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 70 Refer to http://www.eclipse.org for detailed information about Eclipse. Note: We only support problems directly related to the GDB Server. Problems and questions related to your remaining toolchain have to be solved on your own. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 71: Supported Remote (Monitor) Commands
3.3.3 Supported remote (monitor) commands J-Link GDB Server comes with some functionality which are not part of the standard GDB. These functions can be called either via a gdbinit file passed to GDB Server or via monitor commands passed directly to GDB, forwarding them to GDB Server.
Page 72 -device instead. Select the target interface. interface Note: Use command line option instead. Sets the JTAG speed of J-Link / J-Trace. Note: For the initial connection speed, use com- speed mand line option instead. -speed Table 3.3: GDB remote commands Note: The remote commands are case-insensitive.
Page 73 Note: The device should be selected via commandline option -device when starting GDB Server. Example > monitor device STM32F417IG < Selecting device: STM32F417IG 3.3.3.4 DisableChecks Syntax DisableChecks J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 74 #No arguments set via setargs: > monitor getargs < No arguments. #Arguments set via setargs: > monitor getargs < Arguments: test 0 1 2 arg0=4 3.3.3.8 go Syntax J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 75 Deprecated. Use command line option instead. Syntax interface <InterfaceIdentifier> Description Selects the target interface used by J-Link / J-Trace. 3.3.3.11 jtagconf Syntax jtagconf <IRPre> <DRPre> Description Configures a JTAG scan chain with multiple devices on it. <IRPre> is the sum of IRLens of all devices closer to TDI, where IRLen is the number of bits in the IR (Instruction Register) of one device.
Page 76 If <address> is specified, this command writes the memory content at address <address> to register <RegName>. Otherwise this com- mand reads the given register. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 77 Add. information There are different reset strategies for different CPUs. Moreover, the reset strategies which are available differ from CPU core to CPU core. J-Link can perform various reset strategies and always selects the best fitting strategy for the selected device.
Page 78 #Select TELNET port and GDB as output source > monitor semihosting ioclient 3 < Semihosting I/O set to TELNET and GDB Client 3.3.3.21 semihosting ARMSWI Syntax semihosting ARMSWI <Value> J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 79 If no mask is given, an ARM instruction breakpoint will be set. Example #Set a breakpoint (implicit for ARM instructions) > monitor setbp 0x00000000 #Set a breakpoint on a THUMB instruction > monitor setbp 0x00000100 0x01 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 80 <kHz>|auto|adaptive Description Sets the JTAG speed of J-Link / J-Trace. Speed can be either fixed (in kHz), automatic recognition or adaptive. In general, Adaptive is recommended if the target has an RTCK signal which is connected to the corresponding RTCK pin of the device (S-cores only).
Page 81 SWO EnableTarget <CPUFreq[Hz]> <SWOFreq[Hz]> <PortMask[0x01-0xFFFFFFFF] <Mode[0]> Description Configures the target to be able to output SWO data and starts J-Link to capture it. CPU and SWO frequency can be 0 for auto-detection. If CPUFreq is 0, J-Link will measure the current CPU speed.
Page 82 SWO GetSpeedInfo Description Prints the base frequency and the minimum divider of the connected J-Link. With this, the available SWO speeds for J-Link can be calculated and the matching one for the target CPU frequency can be selected. Example > monitor SWO GetSpeedInfo <...
Page 83: Segger-Specific Gdb Protocol Extensions
3.3.4 SEGGER-specific GDB protocol extensions J-Link GDB Server implements some functionality which are not part of the standard GDB remote protocol in general query packets. These SEGGER-specific general query packets can be sent to GDB Server on the low-level of GDB, via maintanace com- mands, or with a custom client connected to GDB Server.
Page 84 Configures STRACE for usage. Configuration for example includes specification of the trace port width to be used for tracing (1-bit, 2-bit, 4-bit (default) Port- Width=%Var%. Note: For more information please refer to UM08002 (J-Link SDK user guide), chapter STRACE. Response <ReturnValue>...
Page 85 Description Read the last recently called instruction addresses. The addresses are returned LIFO, meaning the last recent address is returned first. Note: For more information please refer to UM08002 (J-Link SDK user guide), chapter STRACE. Response <ReturnValue>[<Item0><Item1>...] ReturnValue is a 4 Byte signed integer.
Page 86: Command Line Options
3.3.5 Command line options There are several command line options available for the GDB Server which allow configuration of the GDB Server before any connection to a J-Link is attempted or any connection from a GDB client is accepted. Note:...
Page 87 -notimeout Start GDB Server in single run mode. -singlerun Use a J-Link scriptfile. -scriptfile Select the interface to connect to J-Link (USB/IP). -select Select the J-Link Settings File. -settingsfile Execute a gdb file on first connection. Execute a gdb file on every connection.
Page 88 3.3.5.2 -device Description Tells GDBServer to which device J-Link is connected before the connect sequence is actually performed. It is recommended to use the command line option to select the device instead of using the remote command since for some devices J-Link already needs to know the device at the time of connecting to it since some devices need special connect sequences (e.g.
Page 89 Example jlinkgdbserver -endian little 3.3.5.4 -if Description Selects the target interface which is used by J-Link to connect to the device. The default value is JTAG. Note: Using GDB Server CL this option is mandatory to correctly connect to the target, and should be given before connection via GDB.
Page 90 Do not initialize the CPU registers on startup. Note: For the GUI version, this setting is persistent for following uses of GDB Server until changed via -ir or the GUI. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 91 For the CL version this setting has no effect. Note: For the GUI version, this setting is persistent for following uses of GDB Server until changed via command line option or the GUI. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 92 3.3.5.18 -scriptfile Description Passes the path of a J-Link script file to the GDB Server. This scriptfile is executed before the GDB Server starts the debugging / identifying communication with the tar- get. J-Link scriptfiles are mainly used to connect to targets which need a special con- nection sequence before communication with the core is possible.
Page 93 3.3.5.20 -settingsfile Description Select a J-Link settings file to be used for the target device. The settings fail can con- tain all configurable options of the Settings tab in J-Link Control panel. Syntax -SettingsFile <PathToFile>...
Page 94 (Semihosting and anylized SWO data). Default port is 2333. Note: Using multiple instances of GDB Server, setting custom values for this option is necessary. Syntax -TelnetPort <Port> J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 95 Starts the GDB Server with a gdbinit (configuration) file. GDB Server executes the commands specified in the gdbinit file with every connection of a client / start of a debugging session. Syntax -xc <ConfigurationFilePath> Example jlinkgdbserver -xc C:\MyProject\Sample.gdb J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 96: J-Link Remote Server
J-Link Remote Server allows using J-Link / J-Trace remotely via TCP/IP. This enables you to connect to and fully use a J-Link / J-Trace from another computer. Perfor- mance is just slightly (about 10%) lower than with direct USB connection.
Page 97: Tunneling Mode
The Remote server provides a tunneling mode which allows remote connection to a J- Link / J-Trace from any computer, even from outside the local network. To give access to a J-Link neither a remote desktop or vpn connection nor changing some difficult firewall settings are necessary.
Page 98 J-Link software and documentation package Start J-Link Remote Server in tunneling mode Connect to the J-Link / J-Trace via J-Link commander J-Link Commander can be used to verify a connection to the J-Link can be estab- lished as follows: Start J-Link Commander From within J-Link Commander enter ip tunnel:<SerialNo>...
Page 99 To test whether a connection to the tunnel server can be established or not a network protocol analyzer like Wireshark can help. The network transfer of a successful connection should look like: J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 100: J-Mem Memory Viewer
SFRs can be written. You can choose between 8/16/32-bit size for read and write accesses. J-Mem works nicely when modifying SFRs, especially because it writes the SFR only after the complete value has been entered. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 101: J-Flash
J-Flash is an application to program data images to the flash of a target device. With J-Flash the internal flash of all J-Link supported devices can be programmed, as well as common external flashes connected to the device. Beside flash programming all other flash operations like erase, blank check and flash content verification can be done.
Page 102: J-Link Swo Viewer
Commandline-only version of SWO Viewer. All commands avaible for J-Link SWO Viewer can be used with J-Link SWO Viewer Cl. Similar to the GUI Version,J-Link SWO Viewer Cl asks for a device name or CPU clock speed at startup to be able to...
Page 103: Usage
3.7.2 List of available command line options J-Link SWO Viewer can also be controlled from the command line if used in a auto- mated test environment etc. When passing all necessary information to the utility via command line, the configu- ration dialog at startup is suppressed.
Page 104 Example -settingsfile "C:\Temp\Settings.jlink" 3.7.2.7 swofreq Define the SWO frequency that shall be used by J-Link SWO Viewer for sampling SWO data. Usually not necessary to define since optimal SWO speed is calculated automatically based on the CPU frequency and the capabilities of the connected J-Link.
Page 105: Configure Swo Output After Device Reset
Target example code for terminal output /********************************************************************* SEGGER MICROCONTROLLER GmbH & Co KG Solutions for real time microcontroller applications ********************************************************************** (c) 2012-2013 SEGGER Microcontroller GmbH & Co KG www.segger.com Support: support@segger.com J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 106 // Check if stimulus port is enabled if ((ITM_ENA & 1) == 0) { return; // Wait until STIMx is ready, // then send data while ((ITM_STIM_U8 & 1) == 0); ITM_STIM_U8 = c; J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 107 /********************************************************************* SWO_PrintString() * Function description Print a string via SWO. void SWO_PrintString(const char *s) { // Print out character per character while (*s) { SWO_PrintChar(*s++); J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 108: Swo Analyzer
Usage SWOAnalyzer.exe <SWOfile> This can be achieved by simply dragging the SWO output file created by the J-Link DLL onto the executable. Creating an SWO output file In order to create the SWO output file, which is th input file for the SWO Analyzer, the J-Link config file needs to be modified.
Page 109: Jtagload (Command Line Tool)
JTAGLoad (Command line tool) JTAGLoad is a tool that can be used to open an svf (Serial vector format) file. The data in the file will be sent to the target via J-Link / J-Trace. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 110: J-Link Rdi (Remote Debug Interface)
The J-Link RDI software is an remote debug interface for J-Link. It makes it possible to use J-Link with any RDI compliant debugger. The main part of the software is an RDI-compliant DLL, which needs to be selected in the debugger. There are two addi- tional features available which build on the RDI software foundation.
Page 111: Processor Specific Tools
Selects a command file and starts J-Link STR91x Commander in batch mode. The batch mode of J-Link Commander is similar to the execution of a batch file. The com- mand file is parsed line by line and one command is executed at a time.
Page 112: J-Link Stm32 Unlock (Command Line Tool)
To select from a list of all available emulators on Ethernet, please use * as <IPAddr>. -SelectEmuBySN Connect to a J-Link with a specific serial number via USB. Useful if multiple J-Links are connected to the same PC and multiple instances of J-Link STR91x Commander shall run and each connects to another J-Link.
Page 113 Note: Unprotecting a secured device or will cause a mass erase of the flash memory. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 114: J-Link Software Developer Kit (Sdk)
The J-Link Software Developer Kit is needed if you want to write your own program with J-Link / J-Trace. The J-Link DLL is a standard Windows DLL typically used from C programs (Visual Basic or Delphi projects are also possible). It makes the entire...
Page 115: Setup
Chapter 4 Setup This chapter describes the setup procedure required in order to work with J-Link / J- Trace. Primarily this includes the installation of the J-Link software and documenta- tion package, which also includes a kernel mode J-Link USB driver in your host sys- tem.
Page 116: Installing The J-Link Software And Documentation Pack
J-Link USB driver. Some of the applications require an additional license, free trial licenses are available upon request from www.segger.com. Refer to chapter J-Link software and documentation package on page 61 for an over- view about the J-Link software and documentation pack. 4.1.1...
Page 117 Next > button. The Choose options dialog is opened. The Install J-Link Serial Port Driver installs the driver for J-Links with CDC functionality. It is not preselected since J-Links without CDC functionality do not need this driver.
Page 118 Setup The installation process will be started. The J-Link DLL Updater pops up, which allows you to update the DLL of an installed IDE to the DLL verion which is included in the installer. For furhter infor- mation about the J-Link DLL updater, please refer to J-Link DLL updater on page 129.
Page 119: Setting Up The Usb Interface
In addition you can verify the driver installation by consulting the Windows device manager. If the driver is installed and your J-Link / J-Trace is connected to your com- puter, the device manager should list the J-Link USB driver as a node below "Univer- sal Serial Bus controllers"...
Page 120: Uninstalling The J-Link Usb Driver
4.2.2 Uninstalling the J-Link USB driver If J-Link / J-Trace is not properly recognized by Windows and therefore does not enu- merate, it makes sense to uninstall the J-Link USB driver. This might be the case when: •...
Page 121 (jlink) USB and click the Change/Remove button. Confirm the uninstallation process. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 122: Setting Up The Ip Interface
J-Link Configurator which auto-detects all J-Links that are connected to the host PC via USB & Ethernet. The J-Link Configurator allows the user to setup the IP interface of J-Link. For more information about how to use the J-Link Configurator, please refer to J-Link Configurator on page 125.
Page 123 The Network configuration page allows configuration of network related settings (IP address, subnet mask, default gateway) of J-Link. The user can choose between automatic IP assignment (settings are provided by a DHCP server in the network) and manual IP assignment by selecting the appropriate radio button.
Page 124: Faqs
Setup FAQs How can I use J-Link with GDB and Ethernet? You have to use the J-Link GDB Server in order to connect to J-Link via GDB and Ethernet. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 125: J-Link Configurator
PC. This is the default identification method for current J- Links (J-Link with hardware version 8 or later). For re-configuration of old J-Links or for configuration of the IP settings (use DHCP, IP address, subnet mask, ...) of a J- Link supporting the Ethernet interface, SEGGER provides a GUI-based tool, called J- Link Configurator.
Page 126 When re-configuring older J-Links which use the old enumeration method (USB identification: USB 0 - USB 3) you can only have 1 J-Link connected which uses the old method at the same time. So re-configuration has to be done one at a time.
Page 127: J-Link Usb Identification
J-Link USB identification In general, when using USB, there are two ways in which a J-Link can be identified: • By serial number • By USB address Default configuration of J-Link is: Identification by serial number. Identification via USB address is used for compatibility and not recommended.
Page 128 J-Link he wants to connect to. So even in IDEs which do not have an selection option for the J-Link, it is possible to connect to different J-Links. J-Link / J-Trace (UM08001)
Page 129: Using The J-Link Dll
What is the JLink DLL? The J-LinkARM.dll is a standard Windows DLL typically used from C or C++, but also Visual Basic or Delphi projects. It makes the entire functionality of the J-Link / J- Trace available through the exported functions.
Page 130: Determining The Version Of Jlink Dll
Process Explorer. It shows you details about the DLLs, used by your program, such as manufacturer and version. Process Explorer is - at the time of writing - a free utility which can be downloaded from www.sysinternals.com. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 131: Getting Started With J-Link And Arm Ds-5
RDDI DLL in DS-5. An backup of the original DLL is made automatically. 4.8.1 Replacing the RDDI DLL manually If J-Link DLL Updater is unable to find a DS-5 installation and does not list it for updating, the RDDI DLL can always be replaced manually. For more information about...
Page 132 Click Apply. • Start a new debug session with the newly created debug configuration. • Now the debug session should start and downloaded the application to the tar- get. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 133: Working With J-Link And J-Trace
Chapter 5 Working with J-Link and J-Trace This chapter describes functionality and how to use J-Link and J-Trace. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 134: Connecting The Target System
5.1.2 Verifying target device connection If the USB driver is working properly and your J-Link / J-Trace is connected with the host system, you may connect J-Link / J-Trace to your target hardware. Then start JLink.exe which should now display the normal J-Link / J-Trace related information and in addition to that it should report that it found a JTAG target and the target’s...
Page 135: Indicators
5.2.1 Main indicator For J-Links up to V7, the main indicator is single color (Green). J-Link V8 comes with a bi-color indicator (Green & Red LED), which can show multiple colors: green, red and orange.
Page 136 GREEN, constant Emulator has enumerated and is in Idle mode. GREEN, switched off for J-Link heart beat. Will be activated after the emulator 10ms once per second has been in idle mode for at least 7 seconds. Emulator has a fatal error. This should not normally hap- GREEN, flashing at 1 Hz pen.
Page 137: Input Indicator
5.2.2 Input indicator Some newer J-Links such as the J-Link Pro/Ultra come with additional input/output Indicators. The input indicator is used to give the user some information about the status of the target hardware. 5.2.2.1 Bi-color input indicator Indicator status...
Page 138: Jtag Interface
IAR C-SPY® debugger, ARM’s AXD using RDI, a flash programming application such as SEGGER’s J-Flash, or any other application using J-Link / J-Trace. It is the applica- tion’s responsibility to supply a way to configure the scan chain. Most applications offer a dialog box for this purpose.
Page 139 SEGGER J-Flash configuration dialog This dialog box can be found at Options|Project settings. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 140 This dialog can be found under RDI|Configure for example in IAR Embedded Work- bench®. For detailed information check the IAR Embedded Workbench user guide. IAR J-Link configuration dialog box This dialog box can be found under Project|Options. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 141: Determining Values For Scan Chain Configuration
If only one device is connected to the scan chain, the default configuration can be used. In other cases, J-Link / J-Trace may succeed in automatically recognizing the devices on the scan chain, but whether this is possible depends on the devices present on the scan chain.
Page 142: Jtag Speed
JTAG interface. If you use the adaptive clocking feature, transmission delays, gate delays, and syn- chronization requirements result in a lower maximum clock frequency than with non- adaptive clocking. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 143: Swd Interface
Table 5.6: J-Link supported SWO input speeds 5.4.2.2 Configuring SWO speeds The max. SWO speed in practice is the max. speed which both, target and J-Link can handle. J-Link can handle the frequencies described in SWO on page 143 whereas the max.
Page 144 Example 2 Target CPU running at 10 MHz. Possible SWO output speeds are: 10MHz, 5MHz, 3.33MHz, ... J-Link V7: Supported SWO input speeds are: 6MHz / n, n>= 1: 6MHz, 3MHz, 2MHz, 1.5MHz, ... Permitted combinations are: SWO output SWO input...
Page 145: Multi-Core Debugging
Multi-core debugging J-Link / J-Trace is able to debug multiple cores on one target system connected to the same scan chain. Configuring and using this feature is described in this section. 5.5.1 How multi-core debugging works Multi-core debugging requires multiple debuggers or multiple instances of the same debugger.
Page 146: Using Multi-Core Debugging In Detail
Working with J-Link and J-Trace 5.5.2 Using multi-core debugging in detail Connect your target to J-Link / J-Trace. Start your debugger, for example IAR Embedded Workbench for ARM. Choose Project|Options and configure your scan chain. The picture below shows the configuration for the first CPU core on your target.
Page 147: Things You Should Be Aware Of
JTAG speeds. For example: • Core #1: 2MHz maximum JTAG speed • Core #2: 4MHz maximum JTAG speed • Scan chain: 2MHz maximum JTAG speed J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 148 All cores share the same RESET line. You should be aware that resetting one core through the RESET line means resetting all cores which have their RESET pins con- nected to the RESET line on the target. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 149: Connecting Multiple J-Links / J-Traces To Your Pc
In general, it is possible to have an unlimited number of J-Links / J-Traces connected to the same PC. Current J-Link models are already factory-configured to be used in a multi-J-Link environment, older J-Links can be re-configured to use them in a multi- J-link environment.
Page 150 CHAPTER 5 Working with J-Link and J-Trace In order to re-configure a J-Link to use the new USB identification method use the J- Link Configurator which comes with the J-Link software and documentation package. For more information about the J-Link Configurator and how to use it, please refer to J-Link Configurator on page 125.
Page 151: J-Link Control Panel
J-Link features such as flash download, flash breakpoints and instruction set simulation. The J-Link control panel window can be accessed via the J-Link tray icon in the tray icon list. This icon is available when the debug session is started.
Page 152 Section: Flash download In this section, settings for the use of the J-Link FlashDL feature and related set- tings can be configured. When a license for J-Link FlashDL is found, the color indi- cator is green and "License found" appears right to the J-Link FlashDL usage settings.
Page 153 Save settings: When this button is pushed, the current settings in the Settings tab will be saved in a configuration file. This file is created by J-Link and will be created for each project and each project configuration (e.g. Debug_RAM, Debug_Flash).
Page 154 Note: It is possible for the debugger to bypass the breakpoint functionality of the J-Link software by writing to the debug registers directly. This means for ARM7/ ARM9 cores write accesses to the ICE registers, for Cortex-M3 devices write accesses to the memory mapped flash breakpoint registers and in general simple write accesses for software breakpoints (if the program is located in RAM).
Page 155 In this section the name and the value of the CPU registers are shown. 5.7.1.6 Target Power In this section currently just the power consumption of the target hardware is shown. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 156 In this section SWV information are shown. • Status: Shows the encoding and the baudrate of the SWV data received by the target (Manchester/UART, currently J-Link only supports UART encoding). • Bytes in buffer: Shows how many bytes are in the DLL SWV data buffer.
Page 157: Reset Strategies
Some CPUs can actually be halted before executing any instruction, because the start of the CPU is delayed after reset release. If a pause has been specified, J-Link waits for the specified time before trying to halt the CPU. This can be useful if a bootloader which resides in flash or ROM needs to be started after reset.
Page 158 No reset is performed. Nothing happens. 5.8.1.5 Type 4: Hardware, halt with WP The hardware RESET pin is used to reset the CPU. After reset release, J-Link continu- ously tries to halt the CPU using a watchpoint. This typically halts the CPU shortly after reset release;...
Page 159: Strategies For Cortex-M Devices
It is recommended that the correct device is selected in the debugger so the debugger can pass the device name to the J-Link DLL which makes it possible for J-Link to detect what is the best reset strategy for the device. Moreover, we recom- mend that the debugger uses reset type 0 to allow J-Link to dynamically select what reset is the best for the connected device.
Page 160 Clear VC_CORERESET. This type of reset may fail if: • J-Link has no connection to the debug interface of the CPU because it is in a low power mode. • The debug interface is disabled after reset and needs to be enabled by a device internal bootloader.
Page 161 This reset strategy is only guaranteed to work on "modern" J-Links (J-Link V8, J-Link Pro, J-link ULTRA, J-Trace for Cortex-M, J-Link Lite) and if a SWD speed of min. 1 MHz is used. This reset strategy should also work for J-Links with hardware version 6, but it can not be guaranteed that these J-Links are always fast enough in disabling the watchdog.
Page 162: Using Dcc For Memory Access
This DCC handler typically requires less than 1 µs per call. The DCC handler, as well as the optional DCC abort handler, is part of the J-Link soft- ware package and can be found in the Samples\DCC\IAR directory of the package.
Page 163: J-Link Script Files
Currently this function is only used to configure if the target which is connected to J-Link has an ETB or not. For more information how to configure the existence of an ETB, please refer to Global DLL variables on page 167.
Page 164 Retrieves the JTAG Id of a specified device, in the JTAG chain. The index of the device depends on its position in the JTAG chain. The device closest to TDO has index 0. Prototype __api__ int JTAG_GetDeviceId(int DeviceIndex); J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 165 __api__ int JTAG_StoreDR(unsigned __int64 tdi, int NumBits); 5.10.2.11JTAG_Write() Description Writes a JTAG sequence (max. 64 bits per pin). Prototype __api__ int JTAG_Write(unsigned __int64 tms, unsigned __int64 tdi, int NumBits); J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 166 JTAG chain), which is lost at a TAP reset. Prototype __api__ int JTAG_Reset(void); 5.10.2.17SYS_Sleep() Description Waits for a given number of miliseconds. During this time, J-Link does not communi- cate with the target. Prototype __api__ int SYS_Sleep(int Delayms); J-Link / J-Trace (UM08001)
Page 167: Global Dll Variables
This makes sense on targets where J-Link can not perform a auto-detection of the APs which are present of the target system. Type can only be a known global J-Link DLL AP constant. For a list of all available constants, please refer to Global DLL con- stants on page 170.
Page 168 Example JTAG_TMSPin = 0; If the connected device has an ETB and you want to use it with J-link, this variable should be set to 1. Setting this variable in another function as InitEmu() does not have any effect. EMU_ETB_IsPresent...
Page 169 CoreSight information. Example CORESIGHT_CoreBaseAddr = 0x80030000; Pre-select an AP as an AHB-AP that J-Link uses for debug communication (Cortex-M). Setting this variable is necessary for example when debugging multi-core devices where multiple AHB-APs are present (one for each device).
Page 170: Global Dll Constants
CHAPTER 5 Working with J-Link and J-Trace Variable Description Pre-select an AP as an APB-AP that J-Link uses for debug communication (Cortex-A/R). Setting this variable is necessary for example when debugging multi-core devices where multiple APB-APs are present (one for each device). This function can only be used if a AP-layout has been configured via CORESIGHT_AddAP().
Page 171: Script File Language
CORESIGHT_CUSTOM_AP 5.10.5 Script file language The syntax of the J-Link script file language follows the conventions of the C-lan- guage, but it does not support all expresisons and operators which are supported by the C-language. In the following, the supported operators and expressions are listed.
Page 172: Script File Writing Example
5.10.6 Script file writing example In the following, a short example how a J-Link script file could look like. In this example we assume a JTAG chain with two devices on it (Cortex-A8 4 bits IRLen, cus- tom device 5-bits IRLen).
Page 173 If this file is found, it is executed instead of the standard auto detection of J-Link. If this file is not present, J-Link commander behaves as before and the normal auto- detection is performed. 5.10.7.2 In debugger IDE environment To execute a script file out of your debugger IDE, simply select the script file to exe- cute in the Settings tab of the J-Link control panel and click the save button (after the debug session has been started).
Page 174: Command Strings
Working with J-Link and J-Trace 5.11 Command strings The behavior of the J-Link can be customized via command strings passed to the JLinkARM.dll which controls J-Link. Applications such as the J-Link Commander, but also the C-SPY debugger which is part of the IAR Embedded Workbench, allow pass- ing one or more command strings.
Page 175 To avoid stalling the debug session, a critical memory area can be excluded from access: J-Link will not try to read or write to critical memory areas and instead ignore the access silently. Some debuggers (such as IAR C-SPY) can try to access memory in such areas by dereferencing non-initialized pointers even if the debugged program (the debuggee) is working perfectly.
Page 176 0x40008000-0x7FCFFFFF Reserved 0x7FD02000-0x7FD02000 Reserved 0x80000000-0xDFFFFFFF Reserved To exclude these areas from being accessed through J-Link the map exclude com- mand should be used as follows: map exclude 0x00080000-0x3FFFFFFF map exclude 0x40008000-0x7FCFFFFF map exclude 0x7FD02000-0x7FD02000 map exclude 0x80000000-0xDFFFFFFF 5.11.1.5 map indirectread This command can be used to read a memory area indirectly.
Page 177 This command defines the length of the RESET pulse in milliseconds. The default for the RESET pulse length is 20 milliseconds. Syntax SetResetPulseLen = <value> Example SetResetPulseLen = 50 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 178 Working with J-Link and J-Trace 5.11.1.11 SetResetType This command selects the reset startegy which shall be used by J-Link, to reset the device. The value which is used for this command is analog to the reset type which shall be selected. For a list of all reset types which are available, please refer to Reset strategies on page 157.
Page 179: Using Command Strings
SupplyPower = 1 5.11.1.16 SupplyPowerDefault This command activates power supply over pin 19 of the JTAG connector perma- nently. The KS (Kickstart) versions of J-Link have the V5 supply over pin 19 activated by default. Typical applications This feature is useful for some eval boards that can be powered over the JTAG con- nector.
Page 180 0x10000000-0x3FFFFFFF 5.11.2.2 IAR Embedded Workbench The J-Link command strings can be supplied using the C-SPY debugger of the IAR Embedded Workbench. Open the Project options dialog box and select Debugger. On the Extra Options page, select Use command line options.
Page 181: Switching Off Cpu Clock During Debug
In this case, the CPU will stop at the first instruction in the ISR (typically at address 0x18). J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 182: Cache Handling
Because ARM7 cores have a unified cache, there is no need to handle the caches dur- ing debug. 5.13.4 Cache handling of ARM9 cores ARM9 cores with cache require J-Link / J-Trace to handle the caches during debug. If the processor enters debug state with caches enabled, J-Link / J-Trace does the fol- lowing:...
Page 183: Virtual Com Port (Vcom)
J-Link Configurator which auto-detects all J-Links that are connected to the host PC via USB & Ethernet. The J-Link Configurator allows the user to enable and disable the VCOM. For more information about the J-Link Configurator, please refer to J-Link Configurator on page 125.
Page 184 CHAPTER 5 Working with J-Link and J-Trace J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 185: Flash Download
Chapter 6 Flash download This chapter describes how the flash download feature of the DLL can be used in dif- ferent debugger environments. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 186: Introduction
Moreover, the J-Link DLL also allows programming of CFI-compliant external NOR flash memory. The flash down- load feature of the J-Link DLL does not require an extra license and can be used free of charge.
Page 187: Licensing
Licensing No extra license required. The flash download feature can be used free of charge. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 188: Supported Devices
CHAPTER 6 Flash download Supported devices J-Link supports download into the internal flash of a large number of microcontrol- lers. You can always find the latest list of supported devices on our website: http://www.segger.com/jlink_supported_devices.html In general, J-Link can be used with any ARM7/9/11, Cortex-M0/M1/M3/M4 and Cor- tex-A5/A8/R4 core even if it does not provide internal flash.
Page 189: Setup For Various Debuggers (Internal Flash)
First, choose the right device in the project settings if not already done. The device settings can be found at Project->Options->General Options->Target. To use the J-Link flash loaders, the IAR flash loader has to be disabled. To disable the IAR flash loader, the checkbox Use flash loader(s) at Project->Options->Debug- ger->Download has to be disabled, as shown below.
Page 190 First, choose the device in the project settings if not already done. The device set- tings can be found at Project->Options for Target->Device. To enable the J-Link flash loader J-Link / J-Trace at Project->Options for Tar- get->Utilities has to be selected. It is important that "Update Target before Debug- ging"...
Page 191: J-Link Gdb Server
J-Link GDB Server The configuration for the J-Link GDB Server is done by the .gdbinit file. The follow- ing command has to be added to the .gdbinit file to enable the J-Link flash down- load feature: monitor flash device <DeviceName>...
Page 192: J-Link Commander
.srec), the file needs to be converted into binary first. There are various free soft- ware utilities available which allow data file conversion. Another possibility is to use J-Flash which is part of the J-Link software and documentation package. For convert- ing data files, no J-Flash license is needed.
Page 193: J-Link Rdi
6.4.5 J-Link RDI The configuration for J-Link RDI is done via the J-Link RDI configuration dialog. For more information about the J-Link RDI configuration dialog please refer to UM08004, J-Link RDI User Guide, chapter Configuration dialog. J-Link / J-Trace (UM08001)
Page 194: Setup For Various Debuggers (Cfi Flash)
Using the J-Link flash download feature with IAR Embedded Workbench / Keil MDK is quite simple: First, start the debug session and open the J-Link Control Panel. In the tab "Settings" you will find the location of the settings file.
Page 195: J-Link Gdb Server
6.5.2 J-Link GDB Server The configuration for the J-Link GDB Server is done by the .gdbinit file. The follow- ing commands have to be added to the .gdbinit file to enable the flash download feature: monitor WorkRAM = <SAddr>-<EAddr>...
Page 196 Flash download ware utilities available which allow data file conversion. Another possibility is to use J-Flash which is part of the J-Link software and documentation package. For convert- ing data files, no J-Flash license is needed. In order to convert a hex/mot/... file into a bin file using J-Flash, the following needs...
Page 197: Using The Dll Flash Loaders In Custom Applications
Using the DLL flash loaders in custom applica- tions The J-Link DLL flash loaders make flash behave as RAM from a user perspective, since flash programming is triggered by simply calling the J-Link API functions for memory reading / writing. For more information about how to setup the J-Link API for flash programming please refer to UM08002 J-Link SDK documentation (available for SDK customers only).
Page 199: Flash Breakpoints
Chapter 7 Flash breakpoints This chapter describes how the flash breakpoints feature of the DLL can be used in different debugger environments. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 200: Introduction
Flash breakpoints Introduction The J-Link DLL supports a feature called flash breakpoints which allows the user to set an unlimited number of breakpoints in flash memory rather than only being able to use the hardware breakpoints of the device. Usually when using hardware break- points only, a maximum of 2 (ARM 7/9/11) to 8 (Cortex-A/R) breakpoints can be set.
Page 201: Licensing
In order to use the flash breakpoints feature a separate license is necessary for each J-Link. For some devices J-Link comes with a device-based license and some J-Link models also come with a full license for flash breakpoints but the normal J-Link comes without any licenses. For more information about licensing itself and which devices have a device-based license, please refer to Licensing on page 47.
Page 202: Supported Devices
CHAPTER 7 Flash breakpoints Supported devices J-Link supports flash breakpoints for a large number of microcontrollers. You can always find the latest list of supported devices on our website: http://www.segger.com/jlink_supported_devices.html In general, J-Link can be used with any ARM7/9/11, Cortex-M0/M1/M3/M4 and Cor- tex-A5/A8/R4 core even if it does not provide internal flash.
Page 203: Setup & Compatibility With Various Debuggers
J-Link control panel: 7.4.2 Compatibility with various debuggers Flash breakpoints can be used in all debugger which use the proper J-Link API to set breakpoints. Compatible debuggers/ debug interfaces are: • IAR Embedded Workbench •...
Page 204: Faq
Flash breakpoints Why can flash breakpoints not be used with Rowley Crossworks? Because Rowley Crossworks does not use the proper J-Link API to set breakpoints. Instead of using the breakpoint-API, Crossworks programs the debug hardware directly, leaving J-Link no choice to use its flash breakpoints.
Page 205: Rdi
CPU register set as ARM7 CPUs. This chapter describes how to use the RDI DLL which comes with the J-Link software and documentation package. The J-Link RDI DLL allows the user to use J-Link with any RDI-compliant debugger and IDE.
Page 206: Introduction
J-Link RDI mainly consists of a DLL designed for ARM cores to be used with any RDI compliant debugger. The J-Link DLL feature flash download and flash breakpoints can also be used with J-Link RDI.
Page 207: Licensing
Licensing In order to use the J-Link RDI software a separate license is necessary for each J- Link. For some devices J-Link comes with a device-based license and some J-Link models also come with a full license for J-Link RDI but the normal J-Link comes with- out any licenses.
Page 208: Setup For Various Debuggers
CHAPTER 8 Setup for various debuggers The J-Link RDI software is an ARM Remote Debug Interface (RDI) for J-Link. It makes it possible to use J-Link with any RDI compliant debugger. Basically, J-Link RDI con- sists of a additional DLL ( JLinkRDI.dll ) which builds the interface between the RDI API and the normal J-Link DLL.
Page 209 ( JLinkRDI.dll ) and click OK . Now an extra menu, RDI, has been added to the menu bar. Choose RDI | Configure to configure the J-Link. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 224.
Page 210 ARM. Since IAR EWARM version 5.11 it is possible to use J-Link RDI for Cortex-M devices because SEGGER and IAR have been come to an agreement regarding the RDI register assignment for Cortex-M. The following table...
Page 211: Arm Axd (Arm Developer Suite, Ads)
8.3.2.2 Configuring to use J-Link RDI Start the ARM debugger and select Options | Configure Target..This opens the Choose Target dialog box: Press the Add Button to add the JLinkRDI.dll . J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 212 CHAPTER 8 Now J-Link RDI is available in the Target Environments list. Select J-Link and press OK to connect to the target via J-Link. For more informa- tion about the generic setup of J-Link RDI, please refer to Configuration on page 224.
Page 213: Arm Rvds (Realview Developer Suite)
ARM RVDS (RealView developer suite) 8.3.3.1 Software version J-Link RDI has been tested with ARM RVDS version 2.1 and 3.0. There should be no problems with earlier versions of RVDS (up to version v3.0.1). All screenshots are taken from ARM’s RVDS version 2.1.
Page 214 CHAPTER 8 Select File | Connection | Connect to Target . In the Connection Control dialog use the right mouse click on the first item and select Add/Remove/Edit Devices J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 215 RDI Interface . Back in the RDI Target List Dialog, select JLink-RDI and click Configure . For more information about the generic setup of J-Link RDI, please refer to Configu- J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 216 224. Click the OK button in the configuration dialog. Now close the RDI Target List dialog. Make sure your target hardware is already connected to J-Link. In the Connection control dialog, expand the JLink ARM RDI Interface and select the ARM_0 Processor.
Page 217 Now the RealView Debugger is connected to J-Link. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 218: Ghs Multi
CHAPTER 8 10. A project or an image is needed for debugging. After downloading, J-Link is used to debug the target. 8.3.4 GHS MULTI 8.3.4.1 Software version J-Link RDI has been tested with GHS MULTI version 4.07. There should be no prob- lems with other versions of GHS MULTI.
Page 219 Arguments field: -config -dll <FullPathToJLinkDLLs> Note that JLinkRDI.dll and JLinkARM.dll must be stored in the same directory. If the standard J-Link installation path or another path that includes spaces has been used, enclose the path in quotation marks. Example: -config -dll "C:\Program Files\SEGGER\JLinkARM_V350g\JLinkRDI.dll"...
Page 220 The J-Link RDI Configuration dialog will be opened. For more information about the generic setup of J-Link RDI, please refer to Configuration on page 224. Click the OK button to connect to the target. Build the project and start the debugger.
Page 221: Keil Mdk (Μvision Ide)
8.3.5 KEIL MDK (µVision IDE) 8.3.5.1 Software version J-Link has been tested with KEIL MDK 3.34. There should be no problems with other versions of KEIL µVision. All screenshots are taken from MDK 3.34. 8.3.5.2 Configuring to use J-Link RDI Start KEIL uVision and open the project.
Page 222 Select the location of JLinkRDI.dll in Browse for RDI Driver DLL field. and click the Configure RDI Driver button. The J-Link RDI Configuration dialog will be opened.For more information about the generic setup of J-Link RDI, please refer to Configuration on page 224.
Page 223 After finishing configuration, the project can be build ( Project | Build Target ) and the debugger can be started ( Debug | Start/Stop debug session ). J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 224: Configuration
CHAPTER 8 Configuration This section describes the generic setup of J-Link RDI (same for all debuggers) using the J-Link RDI configuration dialog. 8.4.1 Configuration file JLinkRDI.ini All settings are stored in the file JLinkRDI.ini . This file is located in the same direc- tory as JLinkRDI.dll .
Page 225: General Tab
8.4.4.1 General tab Connection to J-Link This setting allows the user to configure how the DLL should connect to the J-Link. Some J-Link models also come with an Ethernet interface which allows to use an emulator remotely via TCP/IP connection.
Page 226 8.4.4.2 Init tab Macro file A macro file can be specified to load custom settings to configure J-Link RDI with advanced commands for special chips or operations. For example, a macro file can be used to initialize a target to use the PLL before the target application is downloaded, in order to speed up the download.
Page 227 * Purpose: Setup for Philips LPC2294 chip ********************************************************************** SetJTAGSpeed(1000); Reset(0); Write32(0xE01FC040, 0x00000001); // Map User Flash into Vector area at (0-3f) Write32(0xFFE00000, 0x20003CE3); // Setup CS0 Write32(0xE002C014, 0x0E6001E4); // Setup PINSEL2 Register SetJTAGSpeed(2000); J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 228 Automatic JTAG speed • Adaptive clocking For more information about the different speed settings supported by J-Link, please refer to JTAG Speed on page 142. JTAG scan chain with multiple devices The JTAG scan chain allows to specify the instruction register organization of the tar- get system.
Page 229 Furthermore it is necessary for some chips to enter the correct CPU clock frequence. Cache flash contents If enabled, the flash contents is cached by the J-Link RDI software to avoid reading data twice and to speed up the transfer between debugger and target. Allow flash download This allows the J-Link RDI software to download program into flash.
Page 230 An info window can be displayed while flash breakpoints are used showing the cur- rent operation. Depending on your JTAG speed the info window may only hardly to be seen. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 231 157. 8.4.4.7 Log tab A log file can be generated for the J-Link DLL and for the J-Link RDI DLL. This log files may be useful for debugging and evaluating. They may help you to solve a prob- lem yourself but is also needed by the support to help you with it.
Page 232 060:278 (0000) ARM_SetEndian(ARM_ENDIAN_LITTLE) 060:278 (0000) ARM_SetEndian(ARM_ENDIAN_LITTLE) 060:278 (0000) ARM_ResetPullsRESET(OFF) 060:278 (0009) ARM_Reset(): - Writing 0x54 bytes @ 0x00000178 >3E68> 060:287 (0001) ARM_Halt(): **** Warning: Chip has already been halted. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 233: Semihosting
The result is returned in r0, either as an explicit return value or as a pointer to a data block. Even if no result is returned, assume that r0 is corrupted. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 234: Implementation Of Semihosting In J-Link Rdi
• When this breakpoint is hit, J-Link RDI examines the SWI number. • If the SWI is recognized as a semihosting SWI, J-Link RDI emulates it and trans- parently restarts execution of the application. • If the SWI is not recognized as a semihosting SWI, J-Link RDI halts the processor and reports an error.
Page 235: Unexpected / Unhandled Swis
8.5.5 Unexpected / unhandled SWIs When an unhandled SWI is detected by J-Link RDI, the message box below is shown. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 237: Device Specifics
Chapter 9 Device specifics This chapter describes for which devices some special handling is necessary to use them with J-Link. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 238: Analog Devices
CHAPTER 9 Device specifics Analog Devices J-Link has been tested with the following MCUs from Analog Devices: • AD7160 • ADuC7020x62 • ADuC7021x32 • ADuC7021x62 • ADuC7022x32 • ADuC7022x62 • ADuC7024x62 • ADuC7025x32 • ADuC7025x62 • ADuC7026x62 • ADuC7027x62 •...
Page 239 • Analog ADuC7026x62 • Analog ADuC7027x62 • Analog ADuC7030 • Analog ADuC7031 • Analog ADuC7032 • Analog ADuC7033 • Analog ADuC7128 • Analog ADuC7129 • Analog ADuC7229x126 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 240: Atmel
CHAPTER 9 Device specifics ATMEL J-Link has been tested with the following ATMEL devices: • AT91SAM3A2C • AT91SAM3A4C • AT91SAM3A8C • AT91SAM3N1A • AT91SAM3N1B • AT91SAM3N1C • AT91SAM3N2A • AT91SAM3N2B • AT91SAM3N2C • AT91SAM3N4A • AT91SAM3N4B • AT91SAM3N4C • AT91SAM3S1A •...
Page 241: At91Sam7
In order to work with an ATMEL AT91SAM7 device, it has to be initialized. The follow- ing paragraph describes the steps of an init sequence. An example for different soft- ware tools, such as J-Link GDB Server, IAR Workbench and RDI, is given. •...
Page 242 CHAPTER 9 Device specifics Samples GDB Sample # connect to the J-Link gdb server target remote localhost:2331 monitor flash device = AT91SAM7S256 monitor flash download = 1 monitor flash breakpoints = 1 # Set JTAG speed to 30 kHz monitor endian little...
Page 243: At91Sam9
9.2.2 AT91SAM9 9.2.2.1 JTAG settings We recommend using adaptive clocking. This information is applicable to the following devices: • AT91RM9200 • AT91SAM9260 • AT91SAM9261 • AT91SAM9262 • AT91SAM9263 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 244: Dspgroup
CHAPTER 9 Device specifics DSPGroup J-Link has been tested with the following DSPGroup devices: • DA56KLF Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 245: Ember
Ember J-Link has been tested with the following Ember devices: • EM351 • EM357 Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 246: Energy Micro
CHAPTER 9 Device specifics Energy Micro J-Link has been tested with the following Energy Micro devices: • EFM32G200F16 • EFM32G200F32 • EFM32G200F64 • EFM32G210F128 • EFM32G230F32 • EFM32G230F64 • EFM32G230F128 • EFM32G280F32 • EFM32G280F64 • EFM32G280F128 • EFM32G290F32 • EFM32G290F64 •...
Page 247: Freescale
If your device has been locked by setting the MCU security status to "secure", and mass erase via debug interface is not disabled, J-Link is able to unlock your Kinetis K40/K60 device. The device can be unlocked by using the "unlock" command in J- Link Commander.
Page 248 On later silicons, this has been corrected. This bug applies to all devices with mask 0M33Z from the 100MHz series. The J-Link software and documentation package comes with a sample project for the Kinetis K40 and K60 devices which is pre-configured for the TWR-40 and TWR-60 eval boards and ETM / ETB Trace.
Page 249 FCCOB5 = 0x00; // FlexNVM partition code: 256 KB data flash FSTAT = 0x80; // Start command execution while((FSTAT & 0x80) == 0); // Wait until flash controller has finished J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 250: Fujitsu
CHAPTER 9 Device specifics Fujitsu J-Link has been tested with the following Fujitsu devices: • MB9AF102N • MB9AF102R • MB9AF104N • MB9AF104R • MB9BF104N • MB9BF104R • MB9BF105N • MB9BF105R • MB9BF106N • MB9BF106R • MB9BF304N • MB9BF304R • MB9BF305N •...
Page 251: Itron
Itron J-Link has been tested with the following Itron devices: • TRIFECTA Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 252: Infineon
CHAPTER 9 Device specifics Infineon J-Link has been tested with the following Infineon devices: • UMF1110 • UMF1120 • UMF5110 • UMF5120 • XMC1100-T016F00xx • XMC1100-T038F00xx • XMC1100-T038F0xxx • XMC1201-T028F0xxx • XMC1201-T038F0xxx • XMC1202-T016X00xx • XMC1202-T028X00xx • XMC1202-T038X00xx • XMC1203-T016X0xxx •...
Page 253: Luminary Micro
9.10 Luminary Micro J-Link has been tested with the following Luminary Micro devices: • LM3S101 • LM3S102 • LM3S301 • LM3S310 • LM3S315 • LM3S316 • LM3S317 • LM3S328 • LM3S601 • LM3S610 • LM3S611 • LM3S612 • LM3S613 •...
Page 254: Unlocking Lm3Sxxx Devices
If your device has been "locked" accidentially (e.g. by bad application code in flash which mis-configures the PLL) and J-Link can not identify it anymore, there is a spe- cial unlock sequence which erases the flash memory of the device, even if it can not be identified.
Page 255: Nxp
9.11 NXP J-Link has been tested with the following NXP devices: • LPC1111 • LPC1113 • LPC1311 • LPC1313 • LPC1342 • LPC1343 • LPC1751 • LPC1751 • LPC1752 • LPC1754 • LPC1756 • LPC1758 • LPC1764 • LPC1765 •...
Page 256: Lpc Arm7-Based Devices
Indirectly reading solves the fast GPIO problem, because only direct regis- ter access corrupts the register contents. Define a 256 byte aligned area in RAM of the LPC target device with the J-Link com- mand map ram and define afterwards the memory area which should be read indirect with the command map indirectread to use the indirectly reading feature of J-Link.
Page 257: Reset (Cortex-M3 Based Devices)
All devices of the LPC43xx are dual core devices (One Cortex-M4 core and one Cor- tex-M0 core). For these devices, a J-Link script file is needed (exact file depends on if the Cortex-M4 or the Cortex-M0 shall be debugged) in order to guarantee proper functionality.
Page 258: Oki
CHAPTER 9 Device specifics 9.12 OKI J-Link has been tested with the following OKI devices: • ML67Q4002 • ML67Q4003 • ML67Q4050 • ML67Q4051 • ML67Q4060 • ML67Q4061 Currently, there are no specifics for these devices. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 259: Renesas
9.13 Renesas J-Link has been tested with the following Renesas devices: • R5F56104 • R5F56106 • R5F56107 • R5F56108 • R5F56216 • R5F56217 • R5F56218 • R5F562N7 • R5F562N8 • R5F562T6 • R5F562T7 • R5F562TA Currently, there are no specifics for these devices.
Page 260: Samsung
CHAPTER 9 Device specifics 9.14 Samsung J-Link has been tested with the following Samsung devices: • S3FN60D 9.14.1 S3FN60D On the S3FN60D the watchdog may be running after reset (depends on the content of the smart option bytes at addr. 0xC0). The watchdog keeps counting even if the CPU is in debug mode (e.g.
Page 261: St Microelectronics
9.15 ST Microelectronics J-Link has been tested with the following ST Microelectronics devices: • STR710FZ1 • STR710FZ2 • STR711FR0 • STR711FR1 • STR711FR2 • STR712FR0 • STR712FR1 • STR712FR2 • STR715FR0 • STR730FZ1 • STR730FZ2 • STR731FV0 • STR731FV1 •...
Page 262: Str91X
STR91x Commander. 9.15.1.3 Switching the boot bank The bootbank of the STR91x devices can be switched by using the J-Link STR9 Com- mander which is part of the J-Link software and documentation package. For more information about the J-Link STR9 Commander, please refer to J-Link STR91x Com- mander (Command line tool) on page 111.
Page 263 J-Link STM32 Commander (command line utility) For more information about J-Flash, please refer to UM08003, J-Flash User Guide . For more information about the J-Link STM32 Commander, please refer to J-Link STM32 Unlock (Command line tool) on page 112. Note: Unsecuring a secured device will cause a mass-erase of the internal flash memory.
Page 264: Stm32F2Xxx
SEGGER offers a free command line tool which reprograms the option bytes in order to disable the hardware watchdog. For more information about the STM32 commander, please refer to J-Link STM32 Unlock (Command line tool) on page 112. 9.15.2.5 Debugging with software watchdog enabled...
Page 265: Stm32F4Xxx
9.15.4 STM32F4xxx These device are Cortex-M4 based. All devices of this family are supported by J-Link. 9.15.4.1 ETM init The following sequence can be used to prepare STM32F4xxx devices for 4-bit ETM tracing: int v; // Enable GPIOE clock *((volatile int *)(0x40023830)) = 0x00000010;...
Page 266: Texas Instruments
Link GDBServer this needs to be done automatically 9.16.1.1 Selecting the device in the IDE When using J-Link in an IDE, there is usually a way to directly select the device in the IDE, since it usually also needs this information for peripheral register view etc. The selected device is then usually automatically passed to the J-Link DLL.
Page 267: Am35Xx / Am37Xx
Needs a J-Link script file to guarantee proper functionality. J-Link script file can be found at $JLINK_INST_DIR$\Samples\JLink\Scripts For more information about how to use J-Link script files, please refer to Executing J- Link script files on page 172. 9.16.5 TMS470M Needs a J-Link script file to guarantee proper functionality.
Page 268: Omap3530
Needs a J-Link script file to guarantee proper functionality. J-Link script file can be found at $JLINK_INST_DIR$\Samples\JLink\Scripts For more information about how to use J-Link script files, please refer to Executing J- Link script files on page 172. 9.16.7 OMAP3550 Needs a J-Link script file to guarantee proper functionality.
Page 269: Toshiba
9.17 Toshiba J-Link has been tested with the following Toshiba devices: • TMPM321F10FG • TMPM322F10FG • TMPM323F10FG • TMPM324F10FG • TMPM330FDFG • TMPM330FWFG • TMPM330FYFG • TMPM332FWUG • TMPM333FDFG • TMPM333FWFG • TMPM333FYFG • TMPM341FDXBG • TMPM341FYXBG • TMPM360F20FG •...
Page 271: Target Interfaces And Adapters
Chapter 10 Target interfaces and adapters This chapter gives an overview about J-Link / J-Trace specific hardware details, such as the pinouts and available adapters. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 272: 20-Pin Jtag/Swd Connector
Not con- This pin is not connected in J-Link. nected JTAG Reset. Output from J-Link to the Reset signal of the target JTAG port. Typically connected to nTRST of the target nTRST Output CPU.
Page 273 274. Table 10.1: J-Link / J-Trace pinout Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. 10.1.1.1 Target board design We strongly advise following the recommendations given by the chip manufacturer.
Page 274 Pin 19 of the connector can be used to supply power to the target hardware. Supply voltage is 5V, max. current is 300mA. The output current is monitored and protected against overload and short-circuit. Power can be controlled via the J-Link com- mander. The following commands are available to control power:...
Page 275: Pinout For Swd
276. Table 10.3: J-Link / J-Trace SWD pinout Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. J-Link / J-Trace (UM08001)
Page 276 Pin 19 of the connector can be used to supply power to the target hardware. Supply voltage is 5V, max. current is 300mA. The output current is monitored and protected against overload and short-circuit. Power can be controlled via the J-Link commander. The following commands are available to control power: Command...
Page 277: Pinout For Swd + Virtual Com Port (Vcom)
276. Table 10.5: J-Link / J-Trace SWD pinout Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They should also be connected to GND in the target system. J-Link / J-Trace (UM08001)
Page 278: 38-Pin Mictor Jtag And Trace Connector
Target board Target board Target board Target board Target board Trace JTAG Trace JTAG Trace JTAG connector connector connector connector connector connector Target board Target board Target board J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 279: Pinout
Trace signal. For more information, please refer to Trace signal 10 Assignment of trace information pins between ETM archi- tecture versions on page 281. nTRST Active-low JTAG reset Table 10.6: JTAG+Trace connector pinout J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 280 Trace signal 16 Trace signal 4 Trace signal 15 Trace signal 3 Trace signal 14 Trace signal 2 Trace signal 13 Trace signal 1 Table 10.6: JTAG+Trace connector pinout J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 281: Assignment Of Trace Information Pins Between Etm Architecture Versions
TRACE- CLK. Parameter Min. Max. Explanation Tperiod 1000ns Clock period Fmax 1MHz 200MHz Maximum trace frequency 2.5ns High pulse width 2.5ns Low pulse width Table 10.8: Clock frequency J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 282 J-Trace supports half-rate clocking mode. Data is output on each edge of the TRACECLK signal and TRACECLK (max) <= 100MHz. For half-rate clocking, the setup and hold times at the JTAG+Trace connector must be observed. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 283: 19-Pin Jtag/Swd And Trace Connector
Typically connected to TDI of the target CPU. For CPUs Output which do not provide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD. Not connected inside J-Link. Leave open on target hard- ware.
Page 284: Target Power Supply
Pins 11 and 13 of the connector can be used to supply power to the target hardware. Supply voltage is 5V, max. current is 300mA. The output current is monitored and protected against overload and short-circuit. Power can be controlled via the J-Link commander. The following commands are available to control power: Command...
Page 285: 9-Pin Jtag/Swd Connector
Typically connected to TDI of the target CPU. For CPUs Output which do not provide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD. Not connected inside J-Link. Leave open on target hard- ware.
Page 286: Adapters
CHAPTER 10 Target interfaces and adapters 10.5 Adapters There are various adapters available for J-Link as for example the JTAG isolator, the J-Link RX adapter or the J-Link Cortex-M adapter. For more information about the different adapters, please refer to http://www.segger.com/jlink-adapters.html.
Page 287: Background Information
ARM9 architecture is based on Reduced Instruction Set Computer (RISC) principles. The instruction set and the related decode mechanism are greatly simplified com- pared with microprogrammed Complex Instruction Set Computer (CISC). J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 288: Jtag
The instruction register holds the current instruction and its content is used by the TAP controller to decide which test to perform or which data register to access. It consist of at least two shift-register cells. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 289: The Tap Controller
Data may be loaded in parallel to the selected test data registers. Shift-DR The test data register connected between TDI and TDO shifts data one stage towards the serial output with each clock. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 290 Once latched, this new instruction becomes the cur- rent one. The parallel latch prevents changes at the parallel output of the instruction register from occurring during the shifting process. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 291: Embedded Trace Macrocell (Etm)
In the following a sample integration of J-Trace and the trace functionality on the debugger side is shown. The sample is based on IAR’s Embedded Workbench for ARM integration of J-Trace. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 292 CHAPTER 11 Background information 11.2.3.1 Code coverage - Disassembly tracing J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 293 11.2.3.2 Code coverage - Source code tracing J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 294 CHAPTER 11 Background information J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 295: Embedded Trace Buffer (Etb)
No additional special trace port is required, so that the ETB can be read via J-Link. The trace functionality via J-Link is limited by the size of the ETB. While capturing runs, the trace information in the buffer will be overwritten every time the buffer size has been reached.
Page 296: Flash Programming
RDI, (Remote debug interface) is a standard for "debug transfer agents" such as J- Link. It allows using J-Link from any RDI compliant debugger. RDI by itself does not include download to flash. To debug in flash, you need to somehow program your application program (debuggee) into the flash.
Page 297 Implement your own flash loader using the functionality of the JLinkARM.dll as described above. This can be a time consuming process and requires in-depth knowl- edge of the flash programming algorithm used as well as of the target system. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 298: J-Link / J-Trace Firmware
Every time you connect to J-Link / J-Trace, JLinkARM.dll checks if its embedded firm- ware is newer than the one used the J-Link / J-Trace. The DLL will then update the firmware automatically. This process takes less than 3 seconds and does not require a reboot.
Page 299 JLinkARM.dll. This automatically replaces the invalidated firmware with its embedded firmware. In the screenshot: • The red box identifies the new firmware. • The green box identifies the old firmware which has been replaced. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 300 CHAPTER 11 Background information J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 301: Designing The Target Board For Trace
Chapter 12 Designing the target board for trace This chapter describes the hardware requirements which have to be met by the tar- get board. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 302: Overview Of High-Speed Board Design
The decision is related to track length between the ASIC and the JTAG+Trace connector, see Terminating the trace signal on page 303 for further ref- erence. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 303: Terminating The Trace Signal
Care must be taken not to connect devices in this way, unless the distor- tion does not affect device operation. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 304: Signal Requirements
Fmax 200MHz Ts setup time (min.) 2.0ns Th hold time (min.) 1.0ns TRACECLK high pulse width (min.) 1.5ns TRACECLK high pulse width (min.) 1.5ns Table 12.1: Signal requirements J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 305: Support And Faqs
Support and FAQs This chapter contains troubleshooting tips together with solutions for common prob- lems which might occur when using J-Link / J-Trace. There are several steps you can take before contacting support. Performing these steps can solve many problems and often eliminates the need for assistance.
Page 306: Measuring Download Speed
USB 2.0 port • USB 2.0 hub • J-Link • Target with ARM7 running at 50MHz. Below is a screenshot of JLink.exe after the measurement has been performed. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 307: Troubleshooting
12. Start JLink.exe . 13. If JLink.exe displays the J-Link / J-Trace serial number and the target proces- sor’s core ID, the J-Link / J-Trace is working properly and cannot be the cause of your problem. 14. If the problem persists and you own an original product (not an OEM version), see section Contacting support on page 309.
Page 308 CHAPTER 13 Support and FAQs J-Link/J-Trace does not get any connection to the target Most likely reasons: a.) The JTAG cable is defective. b.) The target hardware is defective. Remedy: Follow the steps described in General procedure on page 307.
Page 309: Contacting Support
General procedure on page 307. You may also try your J-Link / J-Trace with another PC and if possible with another target system to see if it works there. If the device functions correctly, the USB setup on the original machine or your target hardware is the source of the problem, not J-Link / J-Trace.
Page 310: Frequently Asked Questions
Can J-Link / J-Trace read back the status of the JTAG pins? Yes, the status of all pins can be read. This includes the outputs of J-Link / J-Trace as well as the supply voltage, which can be useful to detect hardware problems on the target system.
Page 311: Glossary
Chapter 14 Glossary This chapter describes important terms used throughout this manual. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 312 Glossary Adaptive clocking A technique in which a clock signal is sent out by J-Link / J-Trace. J-Link / J-Trace waits for the returned clock before generating the next clock pulse. The technique allows the J-Link / J-Trace interface unit to adapt to differing signal drive capabilities and differing cable lengths.
Page 313 Open collector A signal that may be actively driven LOW by one or more drivers, and is otherwise passively pulled HIGH. Also known as a "wired AND" signal. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 314 The electronic clock signal which times data on the TAP data lines TMS, TDI, and TDO. The electronic signal input to a TAP controller from the data source (upstream). Usu- ally, this is seen connecting the J-Link / J-Trace Interface Unit to the first TAP control- ler. J-Link / J-Trace (UM08001)
Page 315 The electronic signal output from a TAP controller to the data sink (downstream). Usually, this is seen connecting the last TAP controller to the J-Link / J-Trace Inter- face Unit. Test Access Port (TAP) The port used to access a device's TAP Controller. Comprises TCK, TMS, TDI, TDO, and nTRST (optional).
Page 317: Literature And References
Chapter 15 Literature and references This chapter lists documents, which we think may be useful to gain deeper under- standing of technical details. J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 318 [RVI] Trace User Guide, ARM DUI ments on the target side. 0155C It is publicly available from ARM ( www.arm.com ). Table 15.1: Literature and References J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 319 In-Circuit Emulator ......313 Instruction Register ......313 RDI Support ........110 IR ............ 313 Remapping ........314 Remote Debug Interface (RDI) .....314 RESET ..........313 RTCK ..........314 J-Flash ARM ........101 RTOS ..........314 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...
Page 320 TCK .......... 272, 314 TDI .......... 272, 314 TDO ......... 272, 315 Test Access Port (TAP) ......315 Transistor-transistor logic (TTL) ... 315 Watchpoint ........315 Word ..........315 J-Link / J-Trace (UM08001) © 2004-2013 SEGGER Microcontroller GmbH & Co. KG...

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J-trace

Segger J-Link User Manual

1 Introduction

2 Licensing

3 Link Software and Documentation Package

4 Setup

5 Working with J-Link and J-Trace

6 Flash Download

7 Flash Breakpoints

8 Rdi

9 Device Specifics

10 Target Interfaces and Adapters

11 Background Information

12 Designing the Target Board for Trace

13 Support and Faqs

14 Glossary

15 Literature and References

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