Swd Interface - Segger J-Link User Manual

5.4

SWD interface

The J-Link support ARMs Serial Wire Debug (SWD). SWD replaces the 5-pin JTAG port
with a clock (SWDCLK) and a single bi-directional data pin (SWDIO), providing all the
normal JTAG debug and test functionality. SWDIO and SWCLK are overlaid on the
TMS and TCK pins. In order to communicate with a SWD device, J-Link sends out
data on SWDIO, synchronous to the SWCLK. With every rising edge of SWCLK, one
bit of data is transmitted or received on the SWDIO.
5.4.1 SWD speed
Currently only fixed SWD speed is supported by J-Link. The target is clocked at a
fixed clock speed. The SWD speed which is used for target communication should not
exceed target CPU speed * 10. The maximum SWD speed which is supported by J-
Link depends on the hardware version and model of J-Link. For more information
about the maximum SWD speed for each J-Link / J-Trace model, please refer to J-
Link / J-Trace models on page 30.
5.4.2 SWO
Serial Wire Output (SWO) support means support for a single pin output signal from
the core. The Instrumentation Trace Macrocell (ITM) and Serial Wire Output (SWO)
can be used to form a Serial Wire Viewer (SWV). The Serial Wire Viewer provides a
low cost method of obtaining information from inside the MCU.
Usually it should not be necessary to configure the SWO speed because this is usually
done by the debugger.
5.4.2.1 Max. SWO speeds
The supported SWO speeds depend on the connected emulator. They can be retrieved
from the emulator. To get the supported SWO speeds for your emulator, use J-Link
Commander:
J-Link> si 1
J-Link> SWOSpeed
Currently, following speeds are supported:
Emulator
J-Link V9
J-Link Pro/ULTRA V4
Table 5.6: J-Link supported SWO input speeds
5.4.2.2 Configuring SWO speeds
The max. SWO speed in practice is the max. speed which both, target and J-Link can
handle. J-Link can handle the frequencies described in SWO on page 185 whereas the
max. deviation between the target and the J-Link speed is about 3%.
The computation of possible SWO speeds is typically done in the debugger. The SWO
output speed of the CPU is determined by TRACECLKIN, which is normally the same
as the CPU clock.
Example1
Target CPU running at 72 MHz. n is be between 1 and 8192.
Possible SWO output speeds are:
72MHz, 36MHz, 24MHz, ...
J-Link V9: Supported SWO input speeds are: 60MHz / n, n>= 8:
7.5MHz, 6.66MHz, 6MHz, ...
J-Link / J-Trace (UM08001)
//Select target interface SWD
60MHz/n, n >= 8
3.2GHz/n, n >= 64
Speed formula
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Resulting max. speed
7.5 MHz
50 MHz
185