Segger J-Link User Manual page 33

HIGH level input voltage (V
LOW level output voltage (V
load of 10 kOhm
HIGH level output voltage (V
load of 10 kOhm
LOW level output voltage (V
load of 10 kOhm
HIGH level output voltage (V
load of 10 kOhm
SWO sampling frequency
Data input rise time (T
Data input fall time (T
Data output rise time (T
Data output fall time (T
Clock rise time (T
Clock fall time (T
Table 1.1: J-Link specifications
1.3.2.3 Hardware versions
Versions 1-4 (Obsolete)
Obsolete.
Version 5.0 (Obsolete)
Identical to version 4.0 with the following exception:
• Uses a 32-bit RISC CPU.
• Maximum download speed (using DCC) is over 700 Kbytes/second.
• JTAG speed: Maximum JTAG frequency is 12 MHz; possible JTAG speeds are:
48 MHz / n, where n is 4, 5, ..., resulting in speeds of:
12.000 MHz (n = 4)
9.600 MHz (n = 5)
8.000 MHz (n = 6)
6.857 MHz (n = 7)
6.000 MHz (n = 8)
5.333 MHz (n = 9)
4.800 MHz (n = 10)
• Supports adaptive clocking.
Version 5.2 (Obsolete)
Identical to version 5.0 with the following exception:
• Target interface: RESET is open drain.
Version 5.3 (Obsolete)
Identical to version 5.2 with the following exception:
• 5V target supply current limited
5V target supply (pin 19) of Kick-Start versions of J-Link is current monitored
and limited. J-Link automatically switches off 5V supply in case of over-current to
protect both J-Link and host computer. Peak current (<= 10 ms) limit is 1A,
operating current limit is 300mA.
J-Link / J-Trace (UM08001)
)
IH
For 1.8V <= V
) with a
OL
) with a
OH
For 3.6 <= V
) with a
OL
) with a
OH
JTAG/SWD Interface, Timing
)
rdi
)
fdi
)
rdo
)
fdo
)
rc
)
fc
V >= 60% of V
IH IF
<= 3.6V
IF
V <= 10% of V
OL IF
V >= 90% of V
OH IF
<= 5V
IF
V <= 20% of V
OL IF
V >= 80% of V
OH IF
Max. 7.5 MHz
T <= 20ns
rdi
T <= 20ns
fdi
T <= 10ns
rdo
T <= 10ns
fdo
T <= 3ns
rc
T <= 3ns
fc
© 2004-2017 SEGGER Microcontroller GmbH & Co. KG
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