40
1.3.6.1 Additional features
•
Very small form factor
•
Fully software compatible to J-Link
•
Supports any ARM7/9/11, Cortex-A5/A8/A9, Cortex-M0/M0+/M1/M3/M4, Cortex-
R4/R5 core
•
JTAG clock up to 4 MHz
•
SWD, SWO supported for Cortex-M devices
•
Flash download into supported MCUs
•
Standard 20-pin 0.1 inch JTAG connector (compatible to J-Link)
1.3.6.2 Specifications
The following table gives an overview about the specifications (general, mechanical,
electrical) for J-Link Lite ARM. All values are valid for J-Link hardware version 8.
Supported OS
Electromagnetic compatibility (EMC)
Operating temperature
Storage temperature
Relative humidity (non-condensing)
Size (without cables)
Weight (without cables)
USB interface
Target interface
Power supply
Target interface voltage (V
Target supply voltage
Target supply current
LOW level input voltage (V
HIGH level input voltage (V
Data input rise time (T
Data input fall time (T
Data output rise time (T
Data output fall time (T
Clock rise time (T
Clock fall time (T
Table 1.4: J-Link Lite specifications
1.3.6.3 Software and Hardware Features Overview
For detailed information about hardware and software features of your J-Link/J-Trace
model and version see:
https://wiki.segger.com/Software_and_Hardware_Features_Overview
J-Link / J-Trace (UM08001)
CHAPTER 1
Mechanical
JTAG/SWD Interface, Electrical
)
IF
)
IL
)
IH
JTAG/SWD Interface, Timing
)
rdi
)
fdi
)
rdo
)
fdo
)
rc
)
fc
General
For a complete list of all operating sys-
tems which are supported, please refer
to Supported OS on page 29.
EN 55022, EN 55024
+5°C ... +60°C
-20°C ... +65 °C
Max. 90% rH
28mm x 26mm x 7mm
6g
USB 2.0, full speed
JTAG 20-pin
(14-pin adapter available)
USB powered
Max. 50mA + Target Supply current.
3.3V
4.5V ... 5V (if powered with 5V on USB)
Max. 300mA
Max. 40% of V
IF
Min. 60% of V
IF
Max. 20ns
Max. 20ns
Max. 10ns
Max. 10ns
Max. 10ns
Max. 10ns
© 2004-2017 SEGGER Microcontroller GmbH & Co. KG
Introduction
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