Exti Controller; Table 30. Nvic_Sm_0; Table 31. Nvic_Sm_1 - ST STM32F2 Series User Manual

3.6.5

EXTI controller

SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU
configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known
limitations
SM CODE
Description
Ownership
UM1845 - Rev 4
Table 30.
NVIC_SM_0
Periodical read-back of configuration registers
End user
This test is implemented by executing a periodical check of the configuration registers for a system peripheral
against its expected value. Expected values are previously stored in RAM and adequately updated after each
configuration change. The method mainly addresses transient faults affecting the configuration registers, by
detecting bit flips in the registers contents. It addresses also permanent faults on registers because it is
executed at least one time within PST after a peripheral update.
Method must be implemented to any configuration register whose contents are able to interfere with NVIC or
EXTI behavior in case of incorrect settings. Check includes NVIC vector table.
According the state of the art automotive safety standard ISO26262, this method can achieve high levels of
Diagnostic Coverage (refer to ISO26262:5, Table D.4)
An alternative valid implementation requiring less space in SRAM can be realized on the basis of signature
concept:
• Peripheral registers to be checked are read in a row, computing a CRC checksum (use of hardware
CRC is encouraged)
• Obtained signature is compared with the golden value (computed in the same way after each register
update, and stored in SRAM)
• Coherence between signatures is checked by the application software – signature mismatch is
considered as failure detection
Depends on implementation
Depends on implementation
Permanent and Transient
None
Values of configuration registers must be read after the boot before executing the first check
Periodic
Not needed
CPU_SM_0: periodical core self-test software
This method addresses only failures affecting configuration registers, and not peripheral core logic or external
interface.
Attention must be paid to registers containing mixed combination of configuration and status bits. Mask must
be used before saving register contents affecting signature, and related checks, to avoid false positive
detections
Table 31.
NVIC_SM_1
Expected and unexpected interrupt check
End user
Description of hardware and software diagnostics
NVIC_SM_0
NVIC_SM_1
UM1845
page 27/108