Table 82. Vsup_Sm_2; Table 83. Vsup_Sm_3; Table 84. Vsup_Sm_4 - ST STM32F2 Series User Manual

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SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known limitations An external watchdog (refer to CPU_SM_5) can guarantee the same level of protection
SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known limitations
SM CODE
Description
Ownership
Detailed implementation
UM1845 - Rev 4
Table 82.
VSUP_SM_2
VSUP_SM_2
Independent watchdog
ST
The independent watchdog is fed directly by VDD; therefore, major failures in the power supplies
for digital logic (core or peripherals) does not affect its behavior but may lead to a violation of the
IDWG timeout
Reset signal generation
Depends on implementation (watchdog timeout interval)
Permanent
None
IWDG activation. It is recommended to use the "Hardware watchdog" in Option byte settings (IWDG
is automatically enabled after reset)
Continuous
Not needed
CPU_SM_1: control flow monitoring in application software
Table 83.
VSUP_SM_3
VSUP_SM_3
Internal temperature sensor check
End user
The internal temperature sensor must be periodically tested in order to detect abnormal increase of
the die temperature – hardware faults in supply voltage system may cause excessive power
consumption and consequent temperature rise
Depends on implementation
Depends on implementation
Permanent
None
None
Periodic
Not needed
VSUP_SM_3: Supply voltage internal monitoring (PVD)
This method also mitigates the eventuality of common-cause affecting the MCU and due to too high
temperature.
Refer to the device datasheet to set the threshold temperature
Table 84.
VSUP_SM_4
VSUP_SM_4
Peripheral voltage monitoring (PVM)
ST
The device features an embedded programmable voltage detector (PVM) that monitors the 3
independent power supplies and compares it to thresholds. An interrupt can be generated when an
independent power supply drops below the threshold or when it is higher than the threshold
Description of hardware and software diagnostics
UM1845
page 57/108

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