Universal Asynchronous Receiver/Transmitter (Uart); Table 40. Uart_Sm_0; Table 41. Uart_Sm_1; Table 42. Uart_Sm_2 - ST STM32F2 Series User Manual

3.6.8

Universal asynchronous receiver/transmitter (UART)

SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known limitations
SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known
limitations
SM CODE
Description
UM1845 - Rev 4
Table 40. UART_SM_0
UART_SM_0
Periodical read-back of configuration registers
End user
This method must be applied to UART configuration registers.
Detailed information on the implementation of this method can be found in
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Table 41. UART_SM_1
UART_SM_1
Protocol error signals
ST
USART communication module embeds protocol error checks (like additional parity bit check,
overrun, frame error) conceived to detect network-related abnormal conditions. These mechanisms
are able anyway to detect a marginal percentage of hardware random failures affecting the module
itself.
Error signals connected to these checkers are normally handled in a standard communication
software, so the overhead is reduced.
Error flag raise and optional Interrupt Event generation
Depends on peripheral configuration (e.g. baud rate), refer to functional documentation
Permanent and Transient
None
Depends on implementation
Continuous
Not required
UART_SM_2: Information redundancy techniques on messages
USART communication module is fitted by several different configurations – the actual composition
of communication error checks depends on selected configuration
Table 42. UART_SM_2
UART_SM_2
Information redundancy techniques on messages
Description of hardware and software diagnostics
UM1845
Section 3.6.5
page 34/108