Table 36. Dma_Sm_4 - ST STM32F2 Series User Manual

SM CODE
Recommendations and known
limitations
SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known
limitations
UM1845 - Rev 4
DMA_SM_3
None
Table 36. DMA_SM_4
DMA_SM_4
DMA transaction awareness
End user
DMA transactions are non-deterministic by nature, because typically driven by external events like
communication messages reception. Anyway, well-designed safety systems should keep much control
as possible of events – refer for instance to IEC61508:3 Table 2 item 13 requirements for software
architecture.
This method is based on system knowledge of frequency and type of expected DMA transaction. For
instance, an externally connected sensor supposed to send periodically some messages to a STM32
peripheral. Monitoring DMA transaction by a dedicated state machine allows to detect missing or
unexpected DMA activities
Depends on implementation
Depends on implementation
Permanent and Transient
None
Depends on implementation
Continuous
Not needed
CPU_SM_0: periodical core self-test software
Because DMA transaction termination is often linked to an interrupt generation, implementation of this
method can be merged with the safety mechanism NVIC_SM_1: expected and unexpected interrupt
check
Description of hardware and software diagnostics
UM1845
page 31/108