Table 71. Atim_Sm_4 - ST STM32F2 Series User Manual

SM CODE
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known
limitations
SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on MCU configuration
Initialization
Periodicity
Test for the diagnostic
Multiple faults protection
Recommendations and known limitations This method does not addresses timer configuration changes due to soft-errors
Note: IRTIM is not individually mentioned here, being mainly implemented by TIM16 and TIM17 functions. Refer
therefore to related prescriptions.
UM1845 - Rev 4
ATIM_SM_3
Depends on implementation
Continuous
Not needed
CPU_SM_0: periodical core self-test software
Efficiency versus transient failures is linked to final application characteristics. We define as Tm the
minimum duration of PWM wrong signal permanence (wrong frequency, wrong duty, or both) required to
violate the related safety function(s). Efficiency is maximized when execution test frequency is higher than
1/Tm
Table 71.
ATIM_SM_4
Lock bit protection for timers
ST
This safety mechanism allows the end user to lock down specified configuration options, avoiding
unintended modifications by application software. It addresses therefore software development
systematic faults
NA
NA
None (Fault avoidance)
None
Lock protection must be enabled using LOCK bits in the TIMx_BDTR register
Continuous
NA
NA
Description of hardware and software diagnostics
ATIM_SM_4
UM1845
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