Block Diagram; Handling The Board - Altera Cyclone III Reference Manual

Handling the Board

Figure 1–1. Cyclone III Development Board Block Diagram
Power
USB
Measure/
2.0
Display
MAX II
Device (x32)
8MB SRAM
(x32)
64MB Flash
(x16)
256MB DDR2
Dual Channel
(x72)
Handling the
Board
1–4
Cyclone III Development Board

Block Diagram

Figure 1–1 shows the functional block diagram of the Cyclone III
development board.
HSMC Port A
125 MHz
XTAL
2.5V CMOS
1.8V CMOS
Cyclone III
EP3C120F780
SMA Input
1.8V SSTL
50 MHz
Buttons/
Switches
When handling the board it is important to observe the following
precaution:
c
Static Discharge Precaution: Without proper anti-static
handling, the board can be damaged. Therefore, use anti-static
handling precaution when touching the board.
Reference Manual
HSMC Port B
2.5V CMOS
2.5V CMOS
SMA Output
2.5V CMOS
Quad 7-Seg/
User LEDs
RJ-45
Jack
10/100/1000
Ethernet
Graphics LCD
Character LCD
LP Filter and
Audio Amp
PC
Speaker
Header
Altera Corporation
March 2008