Altera Cyclone III Reference Manual page 23

Altera Corporation
March 2008
Table 2–5. MAX II Device Pinout (Part 6 of 9)
MAX II Pin
I/O Standard
Number
1.8 V
H14
1.8 V
G16
2.5 V
J1
2.5 V
J2
2.5 V
H3
2.5 V
H4
2.5 V
H5
2.5 V
F6
2.5 V
F1
2.5 V
G3
2.5 V
G2
2.5 V
D2
2.5 V
E5
2.5 V
D1
2.5 V
F3
2.5 V
F5
2.5 V
E2
2.5 V
F4
2.5 V
E1
2.5 V
F2
2.5 V
G4
2.5 V
G1
2.5 V
G5
2.5 V
H2
—
D13
—
E14
—
E15
—
G12
—
G14
—
G15
—
K12
—
L13
—
P13
Reference Manual
Board Components
Signal
Direction Signal Name
Input
pgm[2]
Input
pgm[3]
Output
pmon_clk
Output
pmon_csn
Bidir
pmon_data
Output
pmon_sdi
Output
pmon_sync
Output
pwr_dig_sel[1]
Output
pwr_dig_sel[2]
Output
pwr_dig_sel[3]
Output
pwr_dig_sel[4]
Output
pwr_seg_a
Output
pwr_seg_b
Output
pwr_seg_c
Output
pwr_seg_d
Output
pwr_seg_dp
Output
pwr_seg_e
Output
pwr_seg_f
Output
pwr_seg_g
Output
pwr_seg_minus
Input
pwr_sel[0]
Input
pwr_sel[1]
Input
pwr_sel[2]
Input
pwr_sel[3]
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
—
RESERVED_INPUT
Cyclone III Development Board
Schematic
2–13