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Altera Cyclone III Reference Manual page 75

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Table 2–51. DDR2 Interface I/O (Part 5 of 6)
Board
Reference
U25, U26 pin P8
Bottom address 8
U25, U26 pin P3
Bottom address 9
LED D16 pin 2
Bottom bus activity LED
U25, U26 pin L2
Bottom bank address 0
U25, U26 pin L3
Bottom bank address 1
U25, U26 pin L1
Bottom bank address 2
U25, U26 pin L7
Bottom column address strobe
U25, U26 pin K2
Bottom clock enable
U25, U26 pin L8
Bottom chip select
U25, U26 pin K9
Bottom on-die termination enable SSTL-18 Class I
U25, U26 pin K7
Bottom row address strobe
U25, U26 pin K3
Bottom write enable
U11, U12 pin M8,
Top address 0
U13 pin H8
U11, U12 pin M3,
Top address 1
U13 pin H3
U11, U12 pin M2,
Top address 10
U13 pin H2
U11, U12 pin P7,
Top address 11
U13 pin K7
U11, U12 pin R2,
Top address 12
U13 pin L2
U11, U12 pin R8,
Top address 13
U13 pin L8
U11, U12 pin R3,
Top address 14
U13 pin L3
U11, U12 pin R7
Top address 15
U11, U12 pin M7,
Top address 2
U13 pin H7
U11, U12 pin N2,
Top address 3
U13 pin J2
U11, U12 pin N8,
Top address 4
U13 pin J8
U11, U12 pin N3,
Top address 5
U13 pin J3
U11, U12 pin N7,
Top address 6
U13 pin J7
Altera Corporation
March 2008
Description
SSTL18 Class 1
SSTL18 Class 1
1.8 V
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL-18 Class I
SSTL-18 Class I
SSTL-18 Class I
SSTL-18 Class I
SSTL-18 Class I
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
SSTL18 Class 1
Reference Manual
Schematic
I/O Standard
Signal Name
DDR2BOT_A8
DDR2BOT_A9
DDR2BOT_ACTIVE AA14
DDR2BOT_BA0
DDR2BOT_BA1
DDR2BOT_BA2
DDR2BOT_CASN
DDR2BOT_CKE
DDR2BOT_CSN
DDR2BOT_ODT
DDR2BOT_RASN
DDR2BOT_WEN
DDR2TOP_A0
DDR2TOP_A1
DDR2TOP_A10
DDR2TOP_A11
DDR2TOP_A12
DDR2TOP_A13
DDR2TOP_A14
DDR2TOP_A15
DDR2TOP_A2
DDR2TOP_A3
DDR2TOP_A4
DDR2TOP_A5
DDR2TOP_A6
Cyclone III Development Board
Board Components
Cyclone III
Device Pin
Number
AH12
AB10
AF3
AF5
AH4
AD21
AG4
AC21
AE24
AE21
AE5
J13
G18
A17
D8
D25
F15
B12
H16
E8
D24
D7
J15
H15
2–65

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