Board Component Blocks - Altera Cyclone III Reference Manual

General Description
1–2
Cyclone III Development Board
To get you started, Altera provides application-specific design examples.
The pre-built and tested design examples allow you to:
■
Create a Cyclone III FPGA design in one hour
■
View Cyclone III FPGA power measurement examples
■
Design a 32-bit soft processor system inside the Cyclone III FPGA in
one hour
The Cyclone III development board has the following main features:
■
Higher logic density to implement more functions and features
■
More embedded memory for high-bandwidth applications
■
Expandable through two Altera High Speed Mezzanine Card
(HSMC) connectors
■
256-MB of dual channel DDR2 SDRAM with a 72-bit data width
■
Supports high-speed external memory interfaces including
dual-channel DDR SDRAM and low-power SRAM
■
Four user push-button switches
■
Eight user LEDs
■
Power consumption display
The Cyclone III development board provides the following advantages:
■
Unique combination of low-cost, low-power Cyclone III FPGA that
supports high-volume, memory-intensive designs
■
Highest multiplier-to-logic ratio FPGA in the industry
■
Lowest cost, density- and power-optimized FPGA
■
Quartus II development software's power optimization tools

Board Component Blocks

The board features the following major component blocks:
■
780-pin Altera Cyclone III EP3C120 FPGA in a BGA package
119K logic elements (LEs)
●
3,888 Kbits of memory
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288 18 x 18 multiplier blocks
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Four phase locked loops (PLLs)
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20 global clock networks
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531 user I/Os
●
1.2 V core power
●
■
256-pin Altera MAX
Array (FBGA) package
1.8 V core power
●
■
On-board memory
256 MB dual-channel DDR2 SDRAM
●
8 MB SRAM
●
Reference Manual
®
II EPM2210G CPLD in a FineLine Ball Grid
Altera Corporation
March 2008