Table 2–45. RGMII Signal Definitions (Part 2 of 2)
Schematic
Marvell Device
Signal Name
ENET_RX_DV
RX_DV
ENET_RXD[3:0]
RXD[3:0]
Table 2–46. Ethernet PHY Component Reference and Manufacturing Information
Board
Description
Reference
U5
Ethernet PHY
Base-T device
f
f
Altera Corporation
March 2008
RGMII Spec
Pin Name
Pin Name
RX_CTL
RD[3:0]
Table 2–46
lists the 10/100/1000 Ethernet PHY component reference and
manufacturing information.
Manufacturer
Marvell
Semiconductor
For more information about the data sheet and related documentation,
contact Marvell at www.marvell.com.
High Speed Mezzanine Cards
The board contains two HSMC interfaces called Port A and Port B. These
HSMC interfaces support both single-ended and differential signaling.
The connector part number is Samtec ASP-122953-01. The HSMC
interface also allows for JTAG, SMBus, clock outputs and inputs, as well
as power for compatible HSMC cards.
The HSMC is an Altera-developed specification, which allows users to
expand the functionality of the development board through the addition
of daughter cards (HSMC cards).
For more information about the HSMC specification such as signaling
standards, signal integrity, compatible connectors, and mechanical
information, visit www.altera.com.
The HSMC connector has 172 total pins, including 120 signal pins, 39
power pins, and 13 ground pins. The ground pins are located between the
two rows of signal and power pins, acting as both a shield and a reference.
The HSMC host connector is based on the 0.5 mm-pitch QSH/QTH
Reference Manual
Description
Receive control signals. RX_DV is encoded on the rising
edge of RX_CLK, RX_ER XORed with RX_DV is encoded
on the falling edge of RX_CLK.
Receive data. In 1000 base-T and 1000 base-X modes,
RXD[3:0] are presented on both edges of RX_CLK. In
100 base-TX and 10 base-T modes, RXD[3:0] are
presented on the rising edge of RX_CLK.
Manufacturing
Part Number
88E1111-B2-CAA1C000
Cyclone III Development Board
Board Components
Manufacturer
Web Site
www.marvell.com
2–51
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