Graphics Lcd (J13) - Altera Cyclone III Reference Manual

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Table 2–39. Graphics LCD Interface I/O
Board
Reference
J13 pin 6 LCD data bus bit 0
J13 pin 7 LCD data bus bit 1
J13 pin 8 LCD data bus bit 2
J13 pin 9 LCD data bus bit 3
J13 pin 10 LCD data bus bit 4
J13 pin 11 LCD data bus bit 5
J13 pin 12 LCD data bus bit 6 _or SCLK
J13 pin 13 LCD data bus bit 7 _or SDATA
J13 pin 28 Parallel interface selection
_high = 68 series, low = 80 series
J13 pin 1 LCD chip select
J13 pin 3 LCD data/command select
J13 pin 5 LCD read enable
J13 pin 2 LCD reset
J13 pin 29 LCD parallel/serial data select
J13 pin 4 LCD write enable
Note to Table 2–39:
(1) For the corresponding Cyclone III device pin number, refer to MAX II device pinout tables on the MAX II device
literature page, www.altera.com/literature/lit-max2.jsp.<Is this the preferred link?>
Altera Corporation
March 2008

Graphics LCD (J13)

The board contains a 30-pin, fine-pitch connector to interface directly to a
128 X 64 dot matrix graphics LCD display via a flex-cable that is soldered
to the display itself. The display is an Optrex part number
F-51852GNFQJ-LB-AIN (blue pixels) or F-51852GNFQJ-LB-CAN (green
pixels). The pinout of this interface connector is compatible with a variety
of displays.
1
The data signals are bussed with the 14-pin LCD header.
For the graphics LCD data sheet and related documentation, visit
www.optrex.com.
Table 2–39 lists the graphics LCD pin names, descriptions, and type.
Signal names and directions are relative to the Cyclone III FPGA.
Description
Reference Manual
I/O Schematic
Standard Signal Name
2.5 V
LCD_DATA0
2.5 V
LCD_DATA1
2.5 V
LCD_DATA2
2.5 V
LCD_DATA3
2.5 V
LCD_DATA4
2.5 V
LCD_DATA5
2.5 V
LCD_DATA6
2.5 V
LCD_DATA7
2.5 V
LCD_BS1
2.5 V
LCD_CSn
2.5 V
LCD_D_Cn
2.5 V
LCD_E_RDn
2.5 V
LCD_RSTn
2.5 V
LCD_SERn
2.5 V
LCD_WEn
Cyclone III Development Board
Board Components
Cyclone III Device
Pin Number
AA4
AD1
V8
AB5
AE2
V5
V6
AB3
Note (1)
AB24
D27
V7
H7
Note (1)
AC4
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