Time Sequence Diagrams - ABB RED650 Technical Manual

Hide thumbs Also See for RED650:
Table of Contents

Advertisement

Section 12
Control
12.2.6.5
342
Master:
High (Master)
Priority
inProgress
OR
unsuccessful
Slave:
Low (Slave)
Priority
start
AND
WAIT
inhibit
commandCloseCB
reclaimTimeStarted
IEC16000160 V1 EN-US
Figure 159:
Master-Slave
If reclosing of the first circuit breaker is unsuccessful, the UNSUCCL output
connected to the INHIBIT input of the slave unit interrupts the reclosing sequence
of the latter. The signals can be cross-connected to allow simple changing of the
priority by just setting the High and the Low priorities without changing the
configuration. The CBCLOSED inputs from each circuit breaker are important in
multi-breaker arrangements to ensure that the circuit breaker was closed at the
beginning of the sequence. If the High priority breaker was not closed its auto
reclosing sequence will not start and the low priority breaker will just continue its
auto reclosing sequence in accordance with its normal settings.

Time sequence diagrams

Some examples of the timing of internal and external signals at typical transient
and permanent faults are shown below in Figure
AND
inhibitWaitForMaster
AND
tWaitForMaster
t
wait
AND
slaveDeadTime
S
AND
R
OR
IEC16000160-1-en.vsdx
160
to 163.
Line differential protection RED650 2.2 IEC
1MRK 505 394-UEN A
WFMASTER
M12458-10 v5
Technical manual

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Relion 650 series

Table of Contents