Technical Data - ABB RED650 Technical Manual

Section 14
Logic
14.1.7
440
IntToBits
STDIR START
in b0
FW
b1
REV
b2
STL1
b3
FWL1
b4
REVL1
b5
STL2
b6
FWL2
b7
REVL2
b8
STL3
b9
FWL3
b10
REVL3
b11
STN
b12
FWN
b13
REVN
b14
b15
b0 = START
b1 = FW
b2 = REV
b3 = STL1
b4 = FWL1
b5 = REVL1
b6 = STL2
b7 = FWL2
b8 = REVL2
b9 = STL3
b10 = FWL3
b11 = REVL3
b12 = STN
b13 = FWN
b14 = REVN
b15 = N/A
IEC16000179 V2 EN-US
Figure 220: The directional logic

Technical data

Table 253: SMPPTRC technical data
Function
Trip action
Minimum trip pulse length
3-pole trip delay
Evolving fault delay
Directional logic
BitsToInt
b0 out
b1
BitsToInt
AND b0 out
b1
XOR
AND
BitsToInt
AND b0 out
b1
XOR
AND
BitsToInt
AND b0 out
b1
XOR
AND
BitsToInt
b0 out
AND
b1
XOR
AND
Range or value
3-ph, 1/3-ph, 1/2/3-ph
(0.000-60.000) s
(0.020-0.500) s
(0.000-60.000) s
Line differential protection RED650 2.2 IEC
1MRK 505 394-UEN A
START
STL1
STL2
STL3
STN
dirGeneral (61850 Standard)
0 = unknown
DIR 1 = forward
2 = backward (reverse)
3 = both
REV
dirPhsA (61850 Standard)
0 = unknown
DIRL1
1 = forward
2 = backward (reverse)
dirPhsB (61850 Standard)
0 = unknown
DIRL2
1 = forward
2 = backward (reverse)
dirPhsC (61850 Standard)
0 = unknown
DIRL3
1 = forward
2 = backward (reverse)
dirNeut (61850 Standard)
0 = unknown
DIRN
1 = forward
2 = backward (reverse)
IEC16000179-2-en.vsdx
M12380-1 v12
Accuracy
-
±0.2% or ±15 ms whichever
is greater
±0.2% or ±15 ms whichever
is greater
±0.2% or ±15 ms whichever
is greater
Technical manual
FW