Test, Testp, Dtest; Bit Tests - Mitsubishi MELSEC-Q/L Programming Manual

TEST, TESTP, DTEST, DTESTP
Program Example
(1) The following program resets the 8th bit of D8 (b8) to 0 when XB is OFF, and sets the 3rd bit of D8 (b3) to 1 when XB is
ON.
[Ladder Mode]
[List Mode]
Step Instruction
[Operation]
b15
Before execution
D8 0 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1
When XB turns OFF.
b15
After execution
D8 0 0 1 1 0 1 0 0 1 1 1 1 1 0 0 1
Remark
Bit set or reset of word devices can also be conducted by bit designation of word devices.
• For the bit specification for word devices, link direct devices, refer to the QnUCPU User's Manual (Function Explanation,
Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals).
The processing of program example (1) would be conducted as shown below if bit designation of a word device had been
used:
7.4.2 TEST, TESTP, DTEST, Bit tests
7.4.2
DTESTP
TEST, TESTP, DTEST, DTESTP
TEST, DTEST
TESTP, DTESTP
: Number of the device where bit data to be extracted is stored (BIN 16 bits)
S1
: Location of the bit data to be extracted (0 to 15 (TEST)/0 to 31 (DTEST)) (BIN 16/32 bits)
S2
: Number of the bit device where the extracted data will be stored (bits)
D
Setting Internal Devices
Data
Bit
S1
S2
D
350
Resets b8 of D8.
Sets b3 of D8.
Device
b8 b3 b0
When XB turns ON.
b8 b3 b0
XB
RST
XB
SET
Command
Command
R, ZR
Word Bit
Resets b8 of D8.
D8.8
Designation of b8 of D8
Sets b3 of D8.
D8.3
Designation of b3 of D8
High
Basic
performance
indicates an instruction symbol of TEST/DTEST.
S 1
S 1
P
J \
U \G
Word
Process Redundant Universal LCPU
D
S2
S2 D
Constants
Zn Other
K, H
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