Mitsubishi MELSEC-Q/L Programming Manual page 301

Function
(1) The number of turning OFF ON input of the device specified by
and the count results are stored in the device specified by
Start of measurement
Execution command OFF
S
OFF
(2) When measurement directed by the SPD instruction has been completed, measurement is done again from 0.
Turn OFF the execution command to stop the measurement directed by the SPD instruction.
1. With the SPD instruction, the argument device data is registered in the work area of the CPU module and counting
operation is processed as a system interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For this reason, the pulses that can be counted
must have longer ON and OFF times than the interrupt interval of the CPU module. The interrupt interval of individual
modules is shown below:
High Performance model QCPU, Process CPU,
Universal model QCPU, LCPU
2. When the High Performance model QCPU or Process CPU is used:
The instruction is not processed when n = 0.
3. The SPD instruction can be used as many as 6 times within all the programs being executed. The seventh and the
subsequent SPD instructions are not processed.
4. While the measurement is in execution (while the command input is ON) by the SPD instruction, the setting value cannot
be changed. Turn OFF the command input before changing the setting value.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
Error
code
The device specified by
4101
device.
Program Example
(1) The following program measures the pulses input to X0 for a period of 500 ms when X10 goes ON, and stores the result
at D0.
[Ladder Mode]
n [ms]
ON
ON
Measurement result is stored at (D)
CPU Module Type Name
Error details
exceeds the range of the corresponding
S
[List Mode]
Step
is counted for just the amount of time specified by n,
S
.
D
n [ms]
Measurement result is stored at (D)
Interrupt Interval
1 ms
Q00J/
Q00/ QnH
Q01
–– ––
Device
Instruction
SPD
QnPH QnPRH QnU LCPU
–– ––
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