Multiple Cpu High-Speed Transmission Dedicated Instruction; Redundant System Instructions (For Redundant Cpu); Instructions For Multiple Cpu High-Speed Transmission; Instructions For Redundant System (For Redundant Cpu) - Mitsubishi MELSEC-Q/L Programming Manual

2.8

Multiple CPU high-speed transmission dedicated instruction

2.8.1

Instructions for Multiple CPU high-speed transmission

Category
Writing
D.DDWR
D.DDWR
Devices to
Another
DP.DDWR
CPU DP.DDWR n
Reading
D.DDRD
D.DDRD
Devices
from
Another
DP.DDRD
DP.DDRD n
CPU
2.9

Redundant system instructions (For Redundant CPU)

2.9.1

Instructions for Redundant system (For Redundant CPU)

Category
System SP.CONT
switching SW
Symbol
In multiple CPU system, data stored in a
n S1 S2 D1 D2
device specified by host CPU (
stored by the number of write points specified
by (
D2
S1 S2 D1 D2
CPU (n) (
In multiple CPU system, data stored in a
n S1 S2 D1 D2
device specified by another CPU (n) (
lrater is stored by the number of read points
specified by (
S1 S2 D1 D2
host CPU (
Symbol
Switches between the control system and
standby system at the END processing of the
SP.CONTSW S D
scan executed with the SP.CONTSW
instruction.
Processing Details
) or later is
S2
+1) into a device specified by another
) or later
D1
D1
+1) into a device specified by
S1
) or late
S2
Processing Details
Execution
Condition
10 -
10 -
10 -
) or
10 -
Execution
Condition
8 -
2
3
4
Page
5
696
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Page
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8
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