Mitsubishi MELSEC-Q/L Programming Manual page 54

Category
DXOR
DXORP
Exclusive
OR
BKXOR
BKXORP
WXNR
WXNRP
WXNR
WXNRP
NON
DXNR
exclusive
DXNRP
logical sum
DXNR
DXNRP
BKXNR
BKXNRP
*1: The number of basic steps is three for the Universal model QCPU and LCPU only.
*2: The number of steps may vary depending on the device and type of CPU module being used.
Component
High Performance model QCPU
Process CPU
Redundant CPU
Basic model QCPU
Universal model QCPU
LCPU
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU, the number of steps increases but
the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Page 110, Section 3.8.
52
Symbol
DXOR S1 S2 D
DXORP S1 S2 D
BKXOR S1 S2 D n
BKXORP S1 S2 D n
WXNR S D
WXNRP S D
WXNR S1 S2 D
WXNRP S1 S2 D
DXNR S D
DXNRP S D
DXNR S1 S2 D
DXNRP S1 S2 D
BKXNR S1 S2 D n
BKXNRP S1 S2 D n
• Word device: Internal device (except for file register ZR)
• Bit device:
• Constant:
Devices other than above
All devices that can be used
Processing Details
(S1+1,S1) (S2+1,S2) (D+1,D)
(S1) (S2) (D)
(S) (D)
(D)
(S2) (D)
(S1)
(D+1,D) (S+1,S) (D+1,D)
(S2+1,S2) (D+1,D)
(S1+1,S1)
(S1) (S2) (D)
Device
Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no indexing.
No limitations
Execution
Condition
n
n
Number of
5
3
3
Page
*3
320
Page
5 -
322
Page
3
324
Page
4
326
*1
Page
*2
324
Page
*3
326
Page
5 -
328
Steps
Note 1)
Note 2)
Note 2)