Table of Contents
Advertisement
DI, EI, IMASK
1. An interrupt pointer occupies 1 step.
Stored at step 50
2. For the information on interrupt conditions, link direct devices, refer to the QnUCPU User's Manual (Function Explanation,
Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals)
3. The DI state (interrupt disabled) is active during the execution of an interrupt program. Do not insert the EI instructions in
interrupt programs to attempt the execution of multiple interrupts, with interrupt programs running inside interrupt
programs.
4. If there are the EI and DI instructions within a master control, these instructions will be executed regardless of the
execution/non-execution status of the MC instruction.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
Error
code
The device specified by
4101
device.
282
T10
X1C
50
X5
53
55
Error details
exceeds the range of the corresponding
S
Y10
Y30
IRET
Q00J/
Q00/
QnH
QnPH QnPRH
Q01
––
––
––
QnU
LCPU
––
Advertisement
Table of Contents
