Mitsubishi MELSEC-Q/L Programming Manual page 299

Function
(1) When the execution command is ON, the following processing is executed.
• Shifts from the value specified by n1 to the value specified by n2 in the number of times specified by n3.
• For n3, designate the number of scans (number of shifts) required for shift from n1 to n2.
No operation if other than 0<n3<32768.
• The system uses +1 to store the number of times the instruction has been executed.
D1
• The value of one variation (one scan) is obtained by the expression below:
Value of one variation (one scan)
Example
0 is varied to 350 in seven scans as shown below.
Value specified by n1 (0)
When the calculated one variation is indivisible, compensation is made to achieve the value specified in n2 by the
number of shifts specified in n3.
Hence, a linear ramp may not be made.
(2) If the scan is performed for the number of moves specified by n3, the complete device specified by
The ON/OFF status of the completion device and the contents of
device designated by
D2
• When +1 is OFF, +0 will go OFF at the next scan, and the RAMP instruction will begin a new move operation from
D2
the value currently at
• When +1 is ON,
D2 D2
(3) When the command is turned OFF during the execution of this instruction, the contents of
this.
When the command goes ON again, the RAMP instruction will begin a new move from the present value at +0.
(4) Do not change the specified values in n1 and n2 before the completion device specified in
Since the same expression is used every scan to calculate the value stored in
sudden variation.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
Error
code
The device specified by
4101
corresponding device.
Caution
(1) When the digit specification of bit device is made to
following condition is met.
• Specification of digits: K8
(Value specified by n2) (Value specified by n1)
Value stored in
D1 + 0 (Present value)
150
100
50
(0)
Number of shifts (7) specified by n3
+1.
+0.
D2
+0 will remain ON, and the contents of
Error details
or exceeds the range of the
D1 D2
D1
(Value specified by n3)
350
300
250
200
Value specified by n2 (350)
Value stored in
(Number of execution times)
+0 are determined by the ON/OFF status of the
D1
+0 will not change.
D1
+1, changing n1/n2 may cause a
D1
Q00J/
Q00/ QnH
Q01
–– ––
, the digit specification of bit device can only be used when the
RAMP
+ 1
D1
+0 is turned ON.
D2
+0 will not change following
D1
+0 turns ON.
D2
QnPH QnPRH QnU LCPU
–– ––
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