Mitsubishi MELSEC-Q/L Programming Manual page 94

Table of Contents

Advertisement

Remark
For timer and counter present values, there are no limits on index register numbers used.
(c) A case where Indexing has been performed, and the actual process device, would be as follows:
(When Z0
20 and Z1
X0
X1
X0
X1
(3) Indexing with 32-bit (Universal model QCPU (excluding Q00UJCPU) and LCPU)
A method of specifing index registers in indexing with 32-bit can be selected from the following two methods.
• Specifing the index registers' range used for indexing with 32-bit.
• Specifing the 32-bit indexing using "ZZ" specification.
32-bit indexing with the "ZZ" specification is only available for the following CPU modules. See the programming tool
operating manual for the available programming tools.
• The first five digits of the serial No. for QnU(D)(H)CPU is "10042" or higher. (excluding Q00UJCPU)
• QnUDE(H)CPU
• LCPU
92
X0
SM400
BCD
T0Z4
X1
SM400
BCD
C100Z6
-5)
Ladder Example
MOV K20
Z0
MOV K 5
Z1
MOV K2X50Z0 K1M38Z1
MOV K20
Z0
MOV K
5
Z1
MOV D0Z0
K3Y12FZ1
Fig. 3.7 Ladder Example and Actual Process Device
Value set for timer
K100
T0
Present value of timer
K4Y30
Value set for counter
K10
C100
Present value of counter
K2Y40
Actual Process Device
X1
MOV K2X64
Description
K2X50Z0
Converts K20 into a hexadecimal number.
K1M38Z1
X1
MOV D20
Description
D0Z0
K3Y12FZ1
K1M33
K2X(50 + 14) = K2X64
K1M(38 - 5) = K1M33
K3Y12A
D (0 + 20) = D20
K3Y(12F - 5) = K3Y12A
Hexadecimal number

Advertisement

Table of Contents
loading

Table of Contents