Mitsubishi MELSEC-Q/L Programming Manual page 243

DINTD
(1) Converts 64-bit floating decimal point type real number designated by
device number designated by
(2) The range of 64-bit floating decimal point type real numbers that can be designated at
-2147483648 to 2147483647.
(3) The integer value stored at
(4) The converted data is the value rounded 64-bit floating-point real number to the first digit after the decimal point.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into
SD0.
Error
code
The specified device value is not within the following range:
-1022
0, 2 | Specified device value | < 2
4140
The specified device value is 0, unnormalized number, nonnumeric,
and ± .
The 64-bit floating point data specified by
4100
is used is outside the
The 64-bit floating point data specified by
4100
instruction is used is outside the -2147483648 to 2147483647 range.
Program Example
(1) The following program converts the 64-bit floating decimal point type real number at D20 to D23 with BIN 16-bit data, and
stores the result at D0.
[Ladder Mode]
[Operation]
D23 D22 D21 D20
Conversion to integer
25915.6796
64-bit floating-point real number
D23 D22 D21 D20
Conversion to integer
33562.3211
64-bit floating-point real number
(2) The following program converts the 64-bit floating decimal point type real number at D20 to D23 with BIN 32-bit data and
stores the result at D0 and D1.
[Ladder Mode]
.
D
S S S S
+3 +2 +1
64-bit floating-point
real number
+1 and is stored as BIN 32 bits.
D D
Error details
1024
when the INTD instruction
S
-
32768 to 32767 range.
when the DINTD
S
[List Mode]
Step
D0
25916
BIN value
An operation erroe occurs because the specified data is larger than -32768.
[List Mode]
Step
INTD, INTDP, DINTD, DINTDP
to BIN 32-bit data, and stores the result at the
S
D +1 D
Upper 16 bits Lower 16 bits
BIN 32 bit
Q00J/
Q00/ QnH
Q01
–– ––
–– ––
–– ––
Instruction Device
Instruction Device
+3, +2, +1 or is from
S S S S
QnPH QnPRH QnU LCPU
–– ––
–– ––
–– ––
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