Edcon, Edconp - Mitsubishi MELSEC-Q/L Programming Manual

EDCON, EDCONP

Program Example
(1) The program which converts 32-bit floating-point real number of the devices, D10 to D11, into 64-bit floating-point real
number when X0 turns ON, and outputs the conversion result to the devices, D0 to D3.
[Ladder Mode]
6.3.17 EDCON, EDCONP Conversion from Double precision to Single precision
6.3.17
EDCON, EDCONP
EDCON
EDCONP
: Conversion source data, or head number of the device where conversion source data is stored (Real number (double precision))
S
: Head number of the device where the converted data is stored (Real number (single precision))
D
Setting Internal Devices
Data
Bit Word
––
S
––
D
Function
Converts 64-bit floating-point real number specified for
result to the device specified for
S +3
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into
SD0.
Error
code
The specified device value is not within the following range:
-1022
4140
0,2 | Specified device value | < 2
The specified device value is 0.
The conversion result exceeds the following range (when an overflow
occurs):
4141
128
2 | Conversion result |
254
[List Mode]
Step
Command
Command
J
R, ZR
Bit
S
.
D
S +2 S +1 S
64-bit floating-point real number
Error details
1024
Device
Instruction
Basic
EDCON
EDCONP
\
U \G
Word
––
––
into 32-bit floating-point real number, and stores the conversion
D +1
32-bit floating-point real number
Q00J/
Q00/ QnH
Q01
–– ––
–– ––
High
Process Redundant Universal
performance
S D
S D
Constants
Zn
E
––
––
D
QnPH QnPRH QnU
–– ––
–– ––
LCPU
Other
––
––
LCPU