APPENDICES
Classifications
Symbol
/
Binary
operation
%
~
&
|
Bit operation
^
>>
<<
Processing time of operation instructions (continued)
Instruction
Division
Remainder
Bit inversion
(complement)
Bit logical AND
Bit logical OR
Bit exclusive OR
Bit right shift
Bit left shift
Operation expression
#0L=#2L/#4L
D800L=D802L/D804L
U3E1\G10000L=U3E1\G10002L/U3E1\G10004L
#0F=#4F/#8F
D800F=D804F/D808F
U3E1\G10000F=U3E1\G10004F/U3E1\G10008F
#0=#1%#2
D800=D801%D802
U3E1\G10000=U3E1\G10001%U3E1\G10002
#0L=#2L%#4L
D800L=D802L%D804L
U3E1\G10000L=U3E1\G10002L%U3E1\G10004L
#0= ~ #1
D800= ~ D801
U3E1\G10000= ~ U3E1\G10001
#0L= ~ #2L
D800L= ~ D802L
U3E1\G10000L= ~ U3E1\G10002L
#0=#1
D800=D801&D802
U3E1\G10000=U3E1\G10001&U3E1\G10002
#0L=#2LL
D800L=D802L&D804L
U3E1\G10000L=U3E1\G10002L&U3E1\G10004L
#0=#1|#2
D800=D801|D802
U3E1\G10000=U3E1\G10001|U3E1\G10002
#0L=#2L|#4L
D800L=D802L|D804L
U3E1\G10000L=U3E1\G10002L|U3E1\G10004L
#0=#1^#2
D800=D801^D802
U3E1\G10000=U3E1\G10001^U3E1\G10002
#0L=#2L^#4L
D800L=D802L^D804L
U3E1\G10000L=U3E1\G10002L^U3E1\G10004L
#0=#1>>#2
D800=D801>>D802
U3E1\G10000=U3E1\G10001>>U3E1\G10002
#0L=#2L>>#4L
D800L=D802L>>D804L
U3E1\G10000L=U3E1\G10002L>>U3E1\G10004L
#0=#1<<#2
D800=D801<<D802
U3E1\G10000=U3E1\G10001<<U3E1\G10002
#0L=#2L<<#4L
D800L=D802L<<D804L
U3E1\G10000L=U3E1\G10002L<<U3E1\G10004L
APP - 33
Processing time [µs]
Q170MCPU
2.5
3.5
4.5
2.5
3.0
2.5
3.5
1.5
2.0
1.5
2.5
2.5
3.5
2.0
3.5
2.0
3.0
2.0
3.0
2.0
3.0
2.0
3.0
2.5
3.5
2.5
3.0
2.0
3.5
2.0
3.0