Logic Compilation; Compiled Logic Equations; Order Of Equations - GE Multilin F650 Instruction Manual

5 SETPOINTS

5.9.2.2 LOGIC COMPILATION

The F650 configuration will be made using the basic operations related before and more complex operations can be
developed inside libraries.
All the graphical configuration performed in the Logic configuration editor must be read and interpreted by the PLC as the
F650 engine. The graphical equations must be translated into compiled equations to be understood by the relay. For this
purpose the logic configuration editor provides a compilation option to compile the whole configuration, creating a series of
equations that will form the logical configuration of the unit.
The next diagram shows the way compiled logic equations are built.
A single equation is composed of one or more inputs, one or more operations, and one output. The order of equations is
determined by the relative position of their outputs.
In the following example is shown the order of compilation for equations determined by their relative position in the
configuration file:
E Q U A T I O N A
E Q U A T IO N B
E Q U A T IO N A
E Q U A T IO N B
In this case, equation A is the first to be executed. However, in the second case, the first equation to be executed would be
B, as its output is before the Equation A output.
GE Multilin
DAT OPERATION
COM PILATIO
EQUATIONS
PLC
Figure 5–50: COMPILED LOGIC EQUATIONS
E Q U A T IO N A O U T P U T
E Q U A T IO N B O U T P U T
E Q U A T I O N B O U T P U T
E Q U A T I O N A O U T P U T
Figure 5–51: ORDER OF EQUATIONS
F650 Digital Bay Controller
5.9 LOGIC CONFIGURATION (PLC EDITOR)
PLC
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