External Count Direction Control Timing (Timer 5); Panasonic - Panasonic MN10285K User Manual

Panax series microcomputer
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Panasonic Semiconductor Development Company
To service the interrupts:
Run the interrupt service routine. The routine must determine the interrupt group,
then clear the interrupt request flag.
Either the TM5IA or TM5IB signal can control the timer 5 count direction. The
count direction is determined at the opposite edge from the count edge (at the
source clock transition occurring in the middle of the count cycle.).
Timer 5 does not operate in STOP mode, when B
clock, it must be synchronized to B
Figure 4-51 shows an example timing chart. In this example, an interrupt occurs
when the timer switches from down to up counting.
TM5CA
TM5CB
0000
1FFF
1FFE
TM5BC
B
/4
OSC
TM5IA
Interrupt
Figure 4-51 External Count Direction Control Timing (Timer 5)
122

Panasonic

16-Bit Timer Setup Examples
is off. If you use an external
OSC
.
OSC
1FFF
1000
1FFD
1FFE
1FFF
0000
0001
MN102H75K/F75K/85K/F85K LSI User Manual
Timers
0002
0FFF
1000
1001
B

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