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Panasonic Semiconductor Development Company
00: 1 dot = 1 VCLK period
01: 1 dot = 2 VCLK periods
10: 1 dot = 3 VCLK periods
11: 1 dot = 4 VCLK periods
GISHT: Graphics initial shutter control
0: Shutter control on
1: Shutter control off
GIHP[9:0]: Graphics initial horizontal position
GIVP: Graphics Initial Vertical Position Register
Bit:
15
14
13
12
GI
GI
—
—
—
VSZ1
VSZ0
Reset:
0
0
0
0
R/W:
R
R
R
R/W
R/W
GIVSZ[1:0]: Graphics initial vertical size
Table 7-17 Graphics Vertical Size Settings
GIVSZ[1:0]
Setting
Interlaced Displays
00
01
10
11
GIVP[9:0]: Graphics initial vertical position
CIHP: Text Initial Horizontal Position Register
Bit:
15
14
13
12
CI
—
—
—
HSZ1
HSZ0
Reset:
0
0
0
0
R/W:
R
R
R
R/W
R/W
CIHSZ[1:0]: Text initial horizontal size
00: 1 dot = 1 VCLK period
01: 1 dot = 2 VCLK periods
10: 1 dot = 3 VCLK periods
11: 1 dot = 4 VCLK periods
CISHT: Graphics initial shutter control
0: Shutter control on
1: Shutter control off
CIHP[9:0]: Graphics initial horizontal position
CIVP: Text Initial Vertical Position Register
Bit:
15
14
13
12
CI
—
—
—
VSZ1
VSZ0
Reset:
0
0
0
0
R/W:
R
R
R
R/W
R/W
206
Panasonic
11
10
9
8
7
6
—
GIVP9 GIVP8 GIVP7 GIVP6 GIVP5 GIVP4 GIVP3 GIVP2 GIVP1 GIVP0
0
0
0
0
0
0
R
R/W
R/W
R/W
R/W
1 Dot Size
Progressive Displays
1 H scan line
2 H scan lines
4 H scan lines
2 H scan lines
6 H scan lines
3 H scan lines
11
10
9
8
7
6
CI
CI
CIHP9 CIHP8 CIHP7 CIHP6 CIHP5 CIHP4 CIHP3 CIHP2 CIHP1 CIHP0
SHT
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
11
10
9
8
7
6
CI
—
CIVP9 CIVP8 CIVP7 CIVP6 CIVP5 CIVP4 CIVP3 CIVP2 CIVP1 CIVP0
0
0
0
0
0
0
R
R/W
R/W
R/W
R/W
MN102H75K/F75K/85K/F85K LSI User Manual
On-Screen Display
OSD Registers
x'007F18'
5
4
3
2
1
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Reserved
1 H scan line
x'007F1A'
5
4
3
2
1
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
x'007F1C'
5
4
3
2
1
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
0
0
R/W
0
0
R/W
0
0
R/W
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