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Panasonic Semiconductor Development Company
6.3
Block Diagram
ADIN0
ADIN1
ADIN2
ADIN3
ADIN4
M
ADIN5
U
ADIN6
X
ADIN7
ADIN8
ADIN9
ADIN10
ADIN11
Storage of converted data
ANNCH
B
Divider
OSC
Figure 6-2 ADC Block Diagram
6.4
A/D Conversion Timing
6.4.1
Selecting the ADC Clock Source
Calculate the A/D conversion time as follows:
conversion time (s) = [12 (cycles)
For example, if you set the clock source to B
96 cycles.
State
S/H
Reference
Clock
144
Panasonic
Analog-to-Digital Converter
128 64
32
16
8
4
Shift register for state information
ANCTR
AN1CH
Interrupt
INC
Compare
generated
A/D interrupt request
(B
cycle) (s) divide-by ratio] / ch
OSC
/8, the conversion time is B
OSC
bit 7
6
5
4
3
2
12 cycles
Figure 6-3 ADC Timing
MN102H75K/F75K/85K/F85K LSI User Manual
Block Diagram
2
1
1
V
DD
V
SS
AN11BUF-AN0BUF
Data registers
8-bit x 12
OSC
- Interrupt
- Write to
register
1
0
Transfer
In continuous mode
S/H
bit 7
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