Count Direction For 4X Two-Phase Encoder Timing Example; X Two-Phase Encoder Input Timing (Timer 5) - Panasonic MN10285K User Manual

Panax series microcomputer
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Timers
16-Bit Timer Setup Examples
MN102H75K/F75K/85K/F85K LSI User Manual
To service the interrupts:
Run the interrupt service routine. The routine must determine the interrupt group,
then clear the interrupt request flag.
Timer 5 can input a two-phase encoder signal. Timer 5 does not operate in STOP
mode, when B
is off. If you use an external clock, it must be synchronized to
OSC
B
.
OSC
Table 4-4 shows the count direction for the timing diagram in figure 4-42. In
down counting, when the binary counter reaches 0, it loops to the value in
TM5CA. An interrupt B occurs when the contents of TM5BC match those of
TM5CB.
Table 4-4 Count Direction for 4x Two-Phase Encoder Timing Example
TM5IA
TM5IB
TM5CA
TM5CB
0000
1FFF
1FFE
TM5BC
TM5IA
TM5IB
Interrupt
Figure 4-42 4x Two-Phase Encoder Input Timing (Timer 5)
113
Panasonic
Up Counting
1
0
0
1
1FFF
1000
1FFD
1FFE
1FFF
0000
Panasonic Semiconductor Development Company
Down Counting
0
1
1
0
0001
0FFF
1000
1001
B

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